PIC18F67J90-I/PT Microchip Technology, PIC18F67J90-I/PT Datasheet - Page 130

• Manufacturer Part Number: PIC18F67J90-I/PT
• Description: IC PIC MCU FLASH 128KB 64-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F67J90-I/PT

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 51
• Ram Memory Size: 3.8310546875KB
• Cpu Speed: 48MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3923 B
• Interface Type: AUSART, EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 4
• Operating Supply Voltage: 2.65 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F87J90 FAMILY
TABLE 9-16:
TABLE 9-17:
DS39933C-page 128
RG0/LCDBIAS0
RG1/TX2/CK2
RG2/RX2/DT2/
V
RG3/V
RG4/SEG26/
RTCC
Legend:
PORTG
LATG
TRISG
LCDSE3
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTG.
Note 1:
LCAP
Pin Name
Name
1
LCAP
2
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Unimplemented on PIC18F6XJ90 devices, read as ‘0’.
LCDBIAS0
PORTG FUNCTIONS
SUMMARY OF REGISTERS ASSOCIATED WITH PORTG
Function
SPIOD
V
V
SEG26
RDPU
U2OD
SE31
RTCC
Bit 7
RG0
RG1
RG2
RG3
RG4
TX2
CK2
RX2
DT2
LCAP
LCAP
1
2
CCP2OD CCP1OD TRISG4
Setting
REPU
U1OD
SE30
TRIS
Bit 6
0
1
x
0
1
1
1
1
0
1
1
1
1
x
0
1
x
0
1
x
x
I/O
RJPU
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
SE29
Bit 5
—
(1)
Type
ANA
ANA
ANA
ANA
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
I/O
ST
ST
ST
ST
ST
ST
ST
ST
Preliminary
LATG4
SE28
Bit 4
RG4
LATG<0> data output.
PORTG<0> data input.
LCD module bias voltage input.
LATG<1> data output.
PORTG<1> data input.
Synchronous serial data output (AUSART module); takes priority over
port data.
Synchronous serial data input (AUSART module); user must configure
as an input.
Synchronous serial clock input (AUSART module).
LATG<2> data output.
PORTG<2> data input.
Asynchronous serial receive data input (AUSART module).
Synchronous serial data output (AUSART module); takes priority over
port data.
Synchronous serial data input (AUSART module); user must configure
as an input.
LCD charge pump capacitor input.
LATG<3> data output.
PORTG<3> data input.
LCD charge pump capacitor input.
LATG<4> data output.
PORTG<4> data input.
LCD segment 26 output; disables all other pin functions.
RTCC output.
TRISG3
LATG3
SE27
Bit 3
RG3
TRISG2
LATG2
SE26
Bit 2
RG2
Description
TRISG1
LATG1
SE25
Bit 1
RG1
© 2009 Microchip Technology Inc.
TRISG0
LATG0
SE24
Bit 0
RG0
Values on
Reset
page
56
56
56
55