PIC18F67J90-I/PT Microchip Technology, PIC18F67J90-I/PT Datasheet - Page 122

IC PIC MCU FLASH 128KB 64-TQFP

PIC18F67J90-I/PT

Manufacturer Part Number
PIC18F67J90-I/PT
Description
IC PIC MCU FLASH 128KB 64-TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F67J90-I/PT

Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
Number Of I /o
51
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
No. Of I/o's
51
Ram Memory Size
3.8310546875KB
Cpu Speed
48MHz
No. Of Timers
4
No. Of Pwm Channels
2
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3923 B
Interface Type
AUSART, EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
51
Number Of Timers
4
Operating Supply Voltage
2.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F67J90-I/PT
Manufacturer:
ON
Quantity:
2 300
Part Number:
PIC18F67J90-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
corresponding Data Direction and Output Latch registers
PIC18F87J90 FAMILY
9.5
PORTD is an 8-bit wide, bidirectional port. The
are TRISD and LATD. All pins on PORTD are digital only
and tolerate voltages up to 5.5V.
All pins on PORTD are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output.
Each of the PORTD pins has a weak internal pull-up. A
single control bit can turn off all the pull-ups. This is
performed by clearing bit RDPU (PORTG<7>). The
weak pull-up is automatically turned off when the port
pin is configured as an output. The pull-ups are
disabled on all device Resets.
DS39933C-page 120
Note:
PORTD, TRISD and
LATD Registers
These pins are configured as digital inputs
on any device Reset.
Preliminary
All of the PORTD pins are multiplexed with LCD
segment drives, controlled by bits in the LCDSE0
register. RD0 is multiplexed with CTMU Pulse
Generator output.
I/O port functionality is only available when the LCD
segments are disabled.
EXAMPLE 9-4:
CLRF
CLRF
MOVLW
MOVWF
PORTD
LATD
0CFh
TRISD
; Initialize PORTD by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RD<3:0> as inputs
; RD<5:4> as outputs
; RD<7:6> as inputs
INITIALIZING PORTD
© 2009 Microchip Technology Inc.

Related parts for PIC18F67J90-I/PT