ATMEGA8515L-8PU Atmel, ATMEGA8515L-8PU Datasheet - Page 189

• Manufacturer Part Number: ATMEGA8515L-8PU
• Description: IC AVR MCU 8K 8MHZ 3V 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8515L-8PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: ATMEGA8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI, USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 512Byte
• # I/os (max): 35
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 40
• Package Type: PDIP W
• Controller Family/series: AVR MEGA
• No. Of I/o's: 35
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 8MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2512F–AVR–12/03
Figure 82. Paral lel Programm ing Ti ming, Loading Sequence wit h Ti ming
Requirements
Note:
Figure 83. Parallel Programming Timing, Reading Sequence (within the same Page)
with Timing Requirements
Note:
Table 91. Parallel Programming Characteristics, V
XTAL1
PAGEL
Symbol
V
I
t
t
t
t
XTAL1
DATA
PP
DVXH
XLXH
XHXL
XLDX
DATA
BS1
XA0
XA1
PP
BS1
XA0
XA1
OE
1. The timing requirements shown in Figure 81 (i.e. t
1. The timing requirements shown in Figure 81 (i.e. t
to loading operation.
to reading operation.
Parameter
Programming Enable Voltage
Programming Enable Current
Data and Control Valid before XTAL1 High
XTAL1 Low to XTAL1 High
XTAL1 Pulse Width High
Data and Control Hold after XTAL1 Low
ADDR0 (Low Byte)
LOAD ADDRESS
(1)
ADDR0 (Low Byte)
LOAD ADDRESS
(LOW BYTE)
(LOW BYTE)
t
XLOL
t
OLDV
(1)
(LOW BYTE)
LOAD DATA
DATA (Low Byte)
READ DATA
(LOW BYTE)
DATA (Low Byte)
t
XLXH
t
BVDV
(HIGH BYTE)
LOAD DATA
CC
= 5V ± 10%
DATA (High Byte)
(HIGH BYTE)
READ DATA
DATA (High Byte)
DVXH
DVXH
ATmega8515(L)
t
XLPH
LOAD DATA
11.5
Min
200
150
67
67
, t
, t
XHXL
XHXL
t
OHDZ
t
PLXH
Typ
, and t
, and t
LOAD ADDRESS
LOAD ADDRESS
XLDX
XLDX
(LOW BYTE)
Max
12.5
(LOW BYTE)
250
ADDR1 (Low Byte)
ADDR1 (Low Byte)
) also apply
) also apply
Units
ns
ns
ns
ns
V
A
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