ATMEGA8L-8MU Atmel, ATMEGA8L-8MU Datasheet - Page 25

IC AVR MCU 8K 8MHZ 3V 32-QFN

ATMEGA8L-8MU

Manufacturer Part Number
ATMEGA8L-8MU
Description
IC AVR MCU 8K 8MHZ 3V 32-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA8L-8MU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Package
32MLF EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
23
Interface Type
SPI/TWI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA8L-8MU
Manufacturer:
AT
Quantity:
20 000
System Clock
and Clock
Options
Clock Systems
and their
Distribution
CPU Clock – clk
I/O Clock – clk
Flash Clock – clk
2486Z–AVR–02/11
I/O
CPU
FLASH
Figure 10
the clocks need not be active at a given time. In order to reduce power consumption, the clocks
to modules not being used can be halted by using different sleep modes, as described in
Management and Sleep Modes” on page
Figure 10. Clock Distribution
The CPU clock is routed to parts of the system concerned with operation of the AVR core.
Examples of such modules are the General Purpose Register File, the Status Register and the
Data memory holding the Stack Pointer. Halting the CPU clock inhibits the core from performing
general operations and calculations.
The I/O clock is used by the majority of the I/O modules, like Timer/Counters, SPI, and USART.
The I/O clock is also used by the External Interrupt module, but note that some external inter-
rupts are detected by asynchronous logic, allowing such interrupts to be detected even if the I/O
clock is halted. Also note that address recognition in the TWI module is carried out asynchro-
nously when clk
The Flash clock controls operation of the Flash interface. The Flash clock is usually active simul-
taneously with the CPU clock.
Timer/Counter
Timer/Counter
Asynchronous
Oscillator
presents the principal clock systems in the Atmel
I/O
is halted, enabling TWI address reception in all sleep modes.
General I/O
External RC
Modules
Oscillator
clk
clk
ASY
I/O
External Clock
Control Unit
AVR Clock
Multiplexer
Clock
ADC
33. The clock systems are detailed
clk
Source Clock
ADC
CPU Core
Reset Logic
clk
Oscillator
clk
Crystal
CPU
FLASH
®
Watchdog Clock
AVR
Crystal Oscillator
Low-Frequency
®
Watchdog Timer
and their distribution. All of
Watchdog
Oscillator
RAM
ATmega8(L)
Figure
Calibrated RC
Flash and
EEPROM
Oscillator
10.
“Power
25

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