PIC18LF24J11-I/SS Microchip Technology, PIC18LF24J11-I/SS Datasheet - Page 133

• Manufacturer Part Number: PIC18LF24J11-I/SS
• Description: IC PIC MCU FLASH 16K 2V 28-SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF24J11-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 28-SSOP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: EUSART, I2C, SPI
• Maximum Clock Frequency: 31 KHz
• Number Of Programmable I/os: 16
• Number Of Timers: 5
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DM183033, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 9-5:
© 2009 Microchip Technology Inc.
RB0/AN12/
INT0/RP3
RB1/AN10/
RTCC/RP4
RB2/AN8/
CTEDG1/
REFO/RP5
RB3/AN9/
CTEDG2/
PMA2/RP6
Legend: DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level
Note 1:
Pin
2:
3:
input/output; x = Don’t care (TRIS bit does not affect port direction or is overridden for this option)
Configuration on POR is determined by the PBADEN Configuration bit. Pins are configured as analog
inputs by default when PBADEN is set and digital inputs when PBADEN is cleared.
All other pin functions are disabled when ICSP™ or ICD are enabled.
This bit is not available on 28-pin devices.
PORTB I/O SUMMARY
Function
CTEDG1
CTEDG2
PMA2
RTCC
REFO
AN12
AN10
INT0
RB0
RP3
RB1
RP4
RB2
AN8
RP5
RB3
AN9
RP6
(3)
Setting
TRIS
1
0
1
1
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
0
1
1
1
0
1
0
I/O
O
O
O
O
O
O
O
O
O
O
O
1
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Type
ANA
ANA
ANA
ANA
TTL
DIG
DIG
TTL
DIG
DIG
DIG
TTL
DIG
DIG
DIG
DIG
TTL
DIG
DIG
I/O
ST
ST
ST
ST
ST
ST
ST
PORTB<0> data input; weak pull-up when RBPU bit is
cleared. Disabled when analog input enabled.
LATB<0> data output; not affected by analog input.
A/D input channel 12.
External interrupt 0 input.
Remappable peripheral pin 3 input.
Remappable peripheral pin 3 output.
PORTB<1> data input; weak pull-up when RBPU bit is
cleared. Disabled when analog input enabled.
LATB<1> data output; not affected by analog input.
A/D input channel 10.
Asynchronous serial transmit data output (USART module).
Remappable peripheral pin 4 input.
Remappable peripheral pin 4 output.
PORTB<2> data input; weak pull-up when RBPU bit is
cleared. Disabled when analog input enabled.
LATB<2> data output; not affected by analog input.
A/D input channel 8.
CTMU Edge 1 input.
Reference output clock.
Remappable peripheral pin 5 input.
Remappable peripheral pin 5 output.
LATB<3> data output; not affected by analog input.
PORTB<3> data input; weak pull-up when RBPU bit is
cleared. Disabled when analog input enabled.
A/D input channel 9.
CTMU edge 2 input.
Parallel Master Port address.
Remappable peripheral pin 6 input.
Remappable peripheral pin 6 output.
PIC18F46J11 FAMILY
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Description
DS39932C-page 133
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