ATMEGA168P-20AU Atmel, ATMEGA168P-20AU Datasheet - Page 158

MCU AVR 16K FLASH 20MHZ 32-TQFP

ATMEGA168P-20AU

Manufacturer Part Number
ATMEGA168P-20AU
Description
MCU AVR 16K FLASH 20MHZ 32-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA168P-20AU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Package
32TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
23
Interface Type
SPI/TWI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA168P-20AU
Manufacturer:
ATMEL
Quantity:
1 250
Part Number:
ATMEGA168P-20AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA168P-20AUR
Manufacturer:
Atmel
Quantity:
10 000
8025L–AVR–7/10
Note:
Table 17-7
rect PWM mode.
Table 17-7.
Note:
• Bits 3, 2 – Reserved
These bits are reserved bits in the ATmega48P/88P/168P and will always read as zero.
• Bits 1:0 – WGM21:0: Waveform Generation Mode
Combined with the WGM22 bit found in the TCCR2B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and two types of
Pulse Width Modulation (PWM) modes (see
Table 17-8.
Notes:
Mode
COM2B1
0
1
2
3
4
5
6
7
0
0
1
1
1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
1. MAX= 0xFF
2. BOTTOM= 0x00
WGM2
pare Match is ignored, but the set or clear is done at BOTTOM. See
Mode” on page 150
pare Match is ignored, but the set or clear is done at TOP. See
page 150
shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to phase cor-
0
0
0
0
1
1
1
1
Compare Output Mode, Phase Correct PWM Mode
Waveform Generation Mode Bit Description
COM2B0
for more details.
WGM1
0
1
0
1
0
0
1
1
0
0
1
1
for more details.
Description
Normal port operation, OC2B disconnected.
Reserved
Clear OC2B on Compare Match when up-counting. Set OC2B on
Compare Match when down-counting.
Set OC2B on Compare Match when up-counting. Clear OC2B on
Compare Match when down-counting.
WGM0
Table
0
1
0
1
0
1
0
1
17-8. Modes of operation supported by the Timer/Counter
Timer/Counter
Mode of
Operation
Normal
PWM, Phase
Correct
CTC
Fast PWM
Reserved
PWM, Phase
Correct
Reserved
Fast PWM
”Modes of Operation” on page
ATmega48P/88P/168P
OCRA
OCRA
OCRA
0xFF
0xFF
0xFF
TOP
(1)
”Phase Correct PWM Mode” on
Immediate
Immediate
Update of
BOTTOM
BOTTOM
OCRx at
TOP
TOP
”Phase Correct PWM
147).
Set on
TOV Flag
BOTTOM
BOTTOM
MAX
MAX
MAX
TOP
(1)(2)
158

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