PIC18LF13K50-I/MQ Microchip Technology, PIC18LF13K50-I/MQ Datasheet - Page 308

• Manufacturer Part Number: PIC18LF13K50-I/MQ
• Description: IC PIC MCU FLASH 512KX8 20-QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF13K50-I/MQ

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 20-QFN
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 14
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: EUSART/I2C/MSSP/SPI/USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• Controller Family/series: PIC18
• No. Of I/o's: 15
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 48MHz
• No. Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F/LF1XK50
FIGURE 24-4:
FIGURE 24-5:
DS41350D-page 308
TBLPTR = 0008FFh
Results: Table reads permitted within Blockn, even when EBTRBn = 0.
Results: All table reads from external blocks to Blockn are disabled whenever EBTRn = 0.
TBLPTR = 0008FFh
Register Values
Register Values
PC = 001FFEh
PC = 003FFEh
TABLAT register returns a value of ‘0’.
TABLAT register returns the value of the data at the location TBLPTR.
EXTERNAL BLOCK TABLE READ (EBTRn) DISALLOWED
EXTERNAL BLOCK TABLE READ (EBTRn) ALLOWED
Program Memory
Program Memory
TBLRD*
Preliminary
TBLRD*
000000h
0007FFh
000800h
001FFFh
002000h
003FFFh
004000h
005FFFh
006000h
007FFFh
000000h
0007FFh
000800h
001FFFh
002000h
003FFFh
004000h
005FFFh
006000h
007FFFh
Configuration Bit Settings
Configuration Bit Settings
WRT1, EBTR1 = 11
WRT2, EBTR2 = 11
WRT3, EBTR3 = 11
WRTB, EBTRB = 11
WRTB, EBTRB = 11
WRT0, EBTR0 = 10
WRT0, EBTR0 = 10
WRT1, EBTR1 = 11
WRT2, EBTR2 = 11
WRT3, EBTR3 = 11
 2010 Microchip Technology Inc.