PIC16F716-I/SO Microchip Technology, PIC16F716-I/SO Datasheet - Page 64

IC PIC MCU FLASH 2KX14 18SOIC

PIC16F716-I/SO

Manufacturer Part Number
PIC16F716-I/SO
Description
IC PIC MCU FLASH 2KX14 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F716-I/SO

Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
18-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
13
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
RS- 232/USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
4-ch x 8-bit
Package
18SOIC W
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILI3-DB16F716 - BOARD DAUGHTER ICEPIC3AC162054 - HEADER INTERFACE ICD2 16F716AC164010 - MODULE SKT PROMATEII DIP/SOIC
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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PICmicro MID-RANGE MCU FAMILY
3.3.1
DS31003A-page 3-14
Power Control (PCON) and STATUS Registers
bit 7
bit 6:3
bit 2
bit 1
bit 0
The Power Control (PCON) register contains a status bit to allow differentiation between a
Power-on Reset (POR) to an external MCLR Reset or WDT Reset. It also contains a status bit to
determine if a Brown-out Reset (BOR) occurred. The power control/status register, PCON has
up to four bits.
The BOR (Brown-out Reset) bit, is unknown on a Power-on-reset. It must initially be set by the
user and checked on subsequent resets to see if BOR = '0' indicating that a Brown-out Reset has
occurred. The BOR status bit is a “don’t care” bit and is not necessarily predictable if the
brown-out circuit is disabled (by clearing the BODEN bit in the Configuration word).
The POR (Power-on Reset) bit, is cleared on a Power-on Reset and is unaffected otherwise. The
user sets this bit following a Power-on Reset. On subsequent resets if POR is ‘0’, it will indicate
that a Power-on Reset must have occurred.
The PER (Parity Error Reset) bit, is cleared on a Parity Error Reset and must be set by user soft-
ware. It will also be set on a Power-on Reset.
The MPEEN (Memory Parity Error Enable) bit, reflects the status of the MPEEN bit in configura-
tion word. It is unaffected by any reset or interrupt.
Register 3-1: PCON Register
bit 7
MPEEN: Memory Parity Error Circuitry Status bit
This bit reflects the value of the MPEEN configuration bit.
Unimplemented: Read as '0'
PER: Memory Parity Error Reset Status bit
1 = No parity error reset occurred
0 = A program memory fetch parity error occurred
POR: Power-on Reset Status bit
1 = No Power-on Reset occurred
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
BOR: Brown-out Reset Status bit
1 = No Brown-out Reset occurred
0 = A Brown-out Reset occurred (must be set in software after a Brown-out Reset or
Legend
R = Readable bit
U = Unimplemented bit, read as ‘0’
MPEEN
Note:
Note:
R-u
(must be set in software after a Power-on Reset or Parity Error Reset occurs)
Power-on Reset occurs)
BOR is unknown on Power-on Reset. It must then be set by the user and checked
on subsequent resets to see if BOR is clear, indicating a brown-out has occurred.
The BOR status bit is a don't care and is not necessarily predictable if the brown-out
circuit is disabled (by clearing the BODEN bit in the Configuration word).
Not all bits may be implemented.
U-0
W = Writable bit
U-0
U-0
u = unchanged bit
- n = Value at POR reset
U-0
R/W-0
PER
1997 Microchip Technology Inc.
R/W-0
POR
bit 0
R/W-0
BOR

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