PIC16F716-I/SO Microchip Technology, PIC16F716-I/SO Datasheet - Page 229

IC PIC MCU FLASH 2KX14 18SOIC

PIC16F716-I/SO

Manufacturer Part Number
PIC16F716-I/SO
Description
IC PIC MCU FLASH 2KX14 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F716-I/SO

Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
18-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
13
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
RS- 232/USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
4-ch x 8-bit
Package
18SOIC W
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILI3-DB16F716 - BOARD DAUGHTER ICEPIC3AC162054 - HEADER INTERFACE ICD2 16F716AC164010 - MODULE SKT PROMATEII DIP/SOIC
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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15.3.3
1997 Microchip Technology Inc.
SPI Master SSPM3:SSPM0 = 00xxb
Typical Connection
MSb
PROCESSOR 1
Serial Input Buffer
Figure 15-2
(Processor 1) initiates the data transfer by sending the SCK signal. Data is shifted out of both
shift registers on their programmed clock edge, and latched on the edge of the clock specified by
the SMP bit. Both processors should be programmed to same Clock Polarity (CKP), then both
controllers would send and receive data at the same time. Whether the data is meaningful (or
dummy data) depends on the application software. This leads to three scenarios for data trans-
mission:
• Master sends data — Slave sends dummy data
• Master sends data — Slave sends data
• Master sends dummy data — Slave sends data
Figure 15-2:
Shift Register
(SSPBUF)
(SSPSR)
shows a typical connection between two microcontrollers. The master controller
LSb
SPI Master/Slave Connection
SDO
SCK
SDI
Serial Clock
SDO
SCK
SDI
Section 15. SSP
SPI Slave SSPM3:SSPM0 = 010xb
MSb
Serial Input Buffer
Shift Register
PROCESSOR 2
(SSPBUF)
(SSPSR)
DS31015A-page 15-9
LSb
15

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