DK-CYCII-2C20N Altera, DK-CYCII-2C20N Datasheet - Page 40

• Manufacturer Part Number: DK-CYCII-2C20N
• Description: CYCLONE II STARTER KIT EP2C20N
• Manufacturer: Altera
• Series: Cyclone® IIr
• Type: FPGAr

Specifications of DK-CYCII-2C20N

• Contents: Dev Board, Quartus®II Web Edition, Nios®II Web Edition, Cables, Accessories, Reference Designs and Demos
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Cyclone
• Silicon Core Number: EP2C
• Silicon Family Name: Cyclone II
• Rohs Compliant: Yes
• For Use With/related Products: Cyclone®II FPGAs
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-1736

Configuring the Cyclone II FPGA
Figure 5–1. The JTAG Configuration Scheme
5–2
Cyclone II FPGA Starter Development Kit User Guide
USB
USB Blaster Circuit
MAX
3128
RUN/PROG
Configuration Procedure
For both the JTAG and AS programming methods, the Cyclone II FPGA
Starter board connects to a host computer via a USB cable. Because of this
connection type, the host computer identifies the board as an Altera
USB-Blaster device. The following sections describe the JTAG and AS
programming steps.
Configuring the FPGA in JTAG Mode
Figure 5–1
configuration bit stream into the Cyclone II FPGA, perform the following
steps:
1.
2.
3.
4.
RUN”
Ensure that power is applied to the Cyclone II FPGA Starter board
Connect the supplied USB cable to the USB-Blaster port on the
board
Configure the JTAG programming circuit on the board by setting
the RUN/PROG switch (on the left side of the board) to the RUN
position
To program the FPGA, use the Quartus II Programmer module to
select a configuration bit-stream file with the .sof filename extension
Configuration
EPCS Serial
Device
illustrates the JTAG configuration setup. To download a
Auto Power on Config
JTAG Config Port
FPGA
Altera Corporation
October 2006