MAX5099ATJ+ Maxim Integrated Products, MAX5099ATJ+ Datasheet - Page 22

IC CONV BUCK SYNC DL 32TQFN-EP

MAX5099ATJ+

Manufacturer Part Number
MAX5099ATJ+
Description
IC CONV BUCK SYNC DL 32TQFN-EP
Manufacturer
Maxim Integrated Products
Type
Step-Down (Buck)r
Datasheet

Specifications of MAX5099ATJ+

Internal Switch(s)
Both
Synchronous Rectifier
Yes
Number Of Outputs
2
Voltage - Output
0.8 ~ 17.1 V
Current - Output
1A, 2A
Frequency - Switching
200kHz ~ 2.2MHz
Voltage - Input
4.5 ~ 19 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
32-TQFN Exposed Pad
Power - Output
2.76W
Output Voltage
5.2 V
Output Current
2 A
Input Voltage
5.2 V to 19 V
Supply Current
4.2 mA
Switching Frequency
1.9 MHz
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
If the output capacitor used is a low-ESR ceramic type,
the ESR frequency is usually far away from the targeted
unity crossover frequency (f
compensation is recommended. Type III compensation
provides two-pole zero pairs. The locations of the zero
and poles should be such that the phase margin peaks
around f
or below the double pole to avoid the conditional stabil-
ity issue.
1) Select a crossover frequency:
2) Calculate the LC double-pole frequency, f
where
and R
4) Calculate C
5) Place a pole
6) Place a second zero, f
whichever is lower.
Dual, 2.2MHz, Automotive Synchronous Buck
Converter with 80V Load-Dump Protection
22
3) Place a zero
______________________________________________________________________________________
F
≥ 10kΩ.
C
. It is also important to place the two zeros at
C
I
=
I
f
for a target unity crossover frequency, f
LC
C
R
f
P
F
I
1
R
×
=
=
=
1
=
f
Z
f
C
=
1
2
2
π
×
2
=
π
f
SW
×
×
π
L
×
×
2
OUT
×
f
0 75
R
ZERO ESR
π
V
1
L
.
f
Procedure 2 (See Figure 4)
I
IN
Z
×
1
OUT
×
Z2
2
f
R
SW
20
1
C
×
×
1
1
C
1
×
×
F
,
, at 0.2 x f
). In this case, Type III
R
C
I
C
f
×
LC
×
at f
F
OUT
I
C
C
F
×
×
R
OUT
ZERO ESR
I
R
C
at
×
F
I
V
0 75
OSC
,
.
C
LC
×
.
or at f
:
f
LC
.
LC
C
.
,
7) Place a second pole at 1/2 the switching frequency.
The boost converter compensation gets complicated
due to the presence of a right-half-plane zero
f
phase while adding positive (+1) slope to the gain
curve. It is important to drop the gain significantly below
unity before the RHP frequency. Use the following pro-
cedure to calculate the compensation components:
1) Calculate the LC double-pole frequency, f
the right-half-plane-zero frequency.
where
Target the unity-gain crossover frequency for:
Figure 4. Type III Compensation Network
ZERO,RHP
. The right-half-plane zero causes a drop in
C
C
R
I
CF
I
f
f
LC
ZERO RHP
=
R1
R2
(
R
V
2
=
OUT
(
π
MIN
,
f
C
×
D
Boost Converter Compensation
0 5
×
=
)
V
.
REF
=
1
f
=
FB_
ZERO RHP
×
L
I
(
OUT MAX
OUT
1
R
f
V
1
SW
2
F
-
+
V
OUT
V
C
5
C
g
π
CF
IN
OUT
,
D R
M
D
F
(
×
×
)
×
2
L
R
C
C
OUT
F
F
(
OUT
MIN
)
×
C
)
COMP_
F
)
1
LC
, and

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