ISL8501IRZ Intersil, ISL8501IRZ Datasheet - Page 18

IC CTLR TRPL PWM/DUAL LDO 24-QFN

ISL8501IRZ

Manufacturer Part Number
ISL8501IRZ
Description
IC CTLR TRPL PWM/DUAL LDO 24-QFN
Manufacturer
Intersil
Type
Step-Down (Buck)r
Datasheet

Specifications of ISL8501IRZ

Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
3
Voltage - Output
0.6 ~ 20 V
Current - Output
1A
Frequency - Switching
500kHz
Voltage - Input
5V, 6 ~ 25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-VQFN
Rohs Compliant
YES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL8501IRZ
Manufacturer:
Intersil
Quantity:
275
The compensation gain uses external impedance networks
Z
loop. A stable control loop has a gain crossing with
-20dB/decade slope and a phase margin greater than 45°.
Include worst case component variations when determining
phase margin.
A more detailed explanation of voltage mode control of a
buck regulator can be found in Tech Brief TB417, titled
“Designing Stable Compensation Networks for Single Phase
Voltage Mode Buck Regulators.”
Layout Considerations
Layout is very important in high frequency switching
converter design. With power devices switching efficiently at
500kHz, the resulting current transitions from one device to
another cause voltage spikes across the interconnecting
impedances and parasitic circuit elements. These voltage
spikes can degrade efficiency, radiate noise into the circuit,
and lead to device overvoltage stress. Careful component
layout and printed circuit board design minimizes these
voltage spikes.
As an example, consider the turn-off transition of the upper
MOSFET. Prior to turn-off, the MOSFET is carrying the full
load current. During turn-off, current stops flowing in the
MOSFET and is picked up by the Schottky diode. Any
parasitic inductance in the switched current path generates a
large voltage spike during the switching interval. Careful
component selection, tight layout of the critical components,
and short, wide traces minimizes the magnitude of voltage
spikes.
There are two sets of critical components in the ISL8501
switching converter. The switching components are the most
critical because they switch large amounts of energy, and
therefore tend to generate large amounts of noise. Next are
the small signal components, which connect to sensitive
nodes or supply critical bypass current and signal coupling.
A multi-layer printed circuit board is recommended. Figure 34
shows the connections of the critical components in the
converter. Note that capacitors C
FIGURE 33. ASYMPTOTIC BODE PLOT OF CONVERTER GAIN
FB
100
-20
-40
-60
80
60
40
20
and Z
0
10
(R
20LOG
MODULATOR
IN
2
/R
to provide a stable, high bandwidth (BW) overall
1
GAIN
)
100
1k
f
Z1
f
FREQUENCY (Hz)
LC
f
Z2
10k
18
f
P1
f
IN
ESR
(V
and C
IN
100k
20LOG
f
/ΔV
P2
OSC
OPEN LOOP
ERROR AMP GAIN
OUT
1M
)
COMPENSATION
could each
CLOSED LOOP
10M
GAIN
GAIN
ISL8501
represent numerous physical capacitors. Dedicate one solid
layer (usually a middle layer of the PC board) for a ground
plane and make all critical component ground connections
with vias to this layer. Dedicate another solid layer as a
power plane and break this plane into smaller islands of
common voltage levels. Keep the metal runs from the
PHASE terminals to the output inductor short. The power
plane should support the input power and output power
nodes. Use copper filled polygons on the top and bottom
circuit layers for the phase nodes. Use the remaining printed
circuit layers for small signal wiring.
In order to dissipate heat generated by the internal LDO and
MOSFET, the ground pad, pin 29, should be connected to
the internal ground plane through at least four vias. This
allows the heat to move away from the IC and also ties the
pad to the ground plane through a low impedance path.
The switching components should be placed close to the
ISL8501 first. Minimize the length of the connections
between the input capacitors, C
by placing them nearby. Position both the ceramic and bulk
input capacitors as close to the upper MOSFET drain as
possible. Position the output inductor and output capacitors
between the upper and lower MOSFETs and the load.
The critical small signal components include any bypass
capacitors, feedback components, and compensation
components. Place the PWM converter compensation
components close to the FB and COMP pins. The feedback
resistors should be located as close as possible to the FB
pin with vias tied straight to the ground plane as required.
5V
FIGURE 34. PRINTED CIRCUIT BOARD POWER PLANES
C
BP1
R
BP
KEY
C
BP2
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT AND/OR POWER PLANE LAYER
VIA CONNECTION TO GROUND PLANE
PVCC
VCC
AND ISLANDS
GND PAD
ISL8501
PHASE
COMP
PGND
VIN
FB
IN
V
, and the power switches
IN
R
C
D
2
2
R
4
C
IN
L
C
C
1
OUT1
C
3
R
1
R
3
V
July 12, 2007
OUT1
FN6500.1

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