NCP1308DR2G ON Semiconductor, NCP1308DR2G Datasheet - Page 11

• Manufacturer Part Number: NCP1308DR2G
• Description: IC CTRLR PWM CM UVLO HV 8SOIC
• Manufacturer: ON Semiconductor

Specifications of NCP1308DR2G

• Pwm Type: Current Mode
• Number Of Outputs: 1
• Frequency - Max: 75kHz
• Voltage - Supply: 11 V ~ 20 V
• Buck: No
• Boost: No
• Flyback: Yes
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: 0°C ~ 125°C
• Package / Case: 8-SOIC (3.9mm Width)
• Frequency-max: 75kHz
• Output Current: 500 mA
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 20 V
• Fall Time: 20 ns
• Rise Time: 40 ns
• Synchronous Pin: No
• Topology: Flyback
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Duty Cycle: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: NCP1308DR2G; NCP1308DR2GOSTR

Shutting off the NCP1308
NPN bipolar transistor as depicted by Figure 21. When
OFF, Q1 is transparent to the operation. When forward
biased, the transistor pulls the FB pin to ground (V
200 mV) and permanently disables the IC. A small time
constant on the transistor base will avoid false triggering
Power Dissipation
Again, adding some copper area around the PCB footprint
will help decreasing this number: 12 mm x 12 mm to drop
R
or 6.5 mm x 6.5 mm with 70 mm copper thickness (2 oz).
As one can see, the designer must be cautious when using
the SO-8 package to check if its thermal performance is
compatible with the total power dissipation. The power
dissipation is simply Vbulk (high line) x I
I
amp-meter in series with the HV pin and compute its
average value.
the bulk connection to the HV pin. This will help to:
The power dissipated by the resistor is thus:
DSS,AVG
ON/OFF
θJA
Shutdown can easily be implemented through a simple
The SOIC package offers a 178°C/W thermal resistor.
We therefore recommend the insertion of a resistor from
P drop +
1. Avoid negative spikes at turn-off on the HV pin
2. Split the power budget between this resistor and
Figure 21. A Simple Bipolar Transistor Totally
down to 100°C/W with 35 mm copper thickness (1 oz)
(see below)
the package. The resistor is calculated by leaving
at least 50 V on pin 8 at minimum input voltage
(suppose 100 Vdc in our case):
R drop v
+
+
+ 99.5 mW
parameter can be measured by inserting an
(I DSS @ R drop @
V dropRMS 2
(7.0 mA @ 7.1 kW @ 0.286) 2
R drop
10 k
V bulkmin * 50 V
Disables the IC
7.0 mA
7.1 kW
10 nF
R drop
DSS duty- cycle ) 2
Q1
t 7.1 kW
1
2
3
4
NCP1308
DSS,AVG
.
CEsat
http://onsemi.com
8
7
6
5
. The
NCP1308
≈
11
where I
duty-cycle of the DSS, that is to say, the time it is on and
the time it stays off (DSS
available at www.onsemi.com/pub/ncp1200.
DSS alone, connect a diode between the auxiliary winding
and the V
(V
Overload Operation
controlled (e.g. wall adapters delivering raw DC level), it
is interesting to implement a true short-circuit protection.
A short-circuit actually forces the output voltage to be at
a low level, preventing a bias current to circulate in the
optocoupler LED. As a result, the FB pin level is pulled up
to 4.2 V, as internally imposed by the IC. The peak current
setpoint goes to the maximum and the supply delivers a
rather high power with all the associated effects. Please
note that this can also happen in case of feedback loss, e.g.
a broken optocoupler. To account for this situation,
NCP1308 hosts a dedicated overload detection circuitry.
Once activated, this circuitry imposes to deliver pulses in
a burst manner with a low duty-cycle. The system recovers
when the fault condition disappears.
the maximum until the output voltage reaches its target and
the feedback loop takes over. This period of time depends
on normal output load conditions and the maximum peak
current allowed by the system. The timeout used by this IC
works with the V
V
device internally watches for an overload current situation.
If this condition is still present when the VCC
reached, the controller stops the driving pulses, prevents
the self-supply current source to restart and puts all the
circuitry in standby, consuming as little as 330 mA typical
(ICC3 parameter). As a result, the V
discharges toward 0. When this level crosses 5.3 V typical,
the controller enters a new startup phase by turning the
current source on: V
output pulses at the VCC
condition has been removed before VCC
then the IC continues its normal operation. Otherwise, a
new fault cycle takes place. Figure 22 on the following
page shows the evolution of the signals in presence of a
fault.
CC
Please refer to the application note AND8069/D
If the power consumption budget is really too high for the
In applications where the output current is purposely not
During the startup phase, the peak current is pushed to
CC
decreases from the VCC
> 10 V).
DSS
CC
is the peak DSS capability, DSS
pin which will disable the DSS operation
CC
CC
decoupling capacitor: as soon as the
rises toward 12 V and again delivers
duty- cycle
OFF
OFF
crossing point. If the fault
level (typically 12 V) the
= on/(on + off) ).
CC
ON
duty- cycle
level slowly
approaches,
ON
level is
is the