AD650JNZ Analog Devices Inc, AD650JNZ Datasheet - Page 16

IC V-F/F-V CONVERTER 14-DIP

AD650JNZ

Manufacturer Part Number
AD650JNZ
Description
IC V-F/F-V CONVERTER 14-DIP
Manufacturer
Analog Devices Inc
Type
Volt to Freq & Freq to Voltr
Datasheet

Specifications of AD650JNZ

Mounting Type
Through Hole
Frequency - Max
1MHz
Full Scale
±150ppm/°C
Linearity
±0.1%
Package / Case
14-DIP (0.300", 7.62mm)
Frequency
1MHz
Full Scale Range
1MHz
Linearity %
0.02%
Supply Voltage Range
± 9V To ± 18V
Digital Ic Case Style
DIP
No. Of Pins
14
Ic Generic Number
650
Converter Function
VFC/FVC
Full Scale Frequency
1000
Power Supply Requirement
Dual
Single Supply Voltage (typ)
Not RequiredV
Single Supply Voltage (max)
Not RequiredV
Single Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (min)
±9V
Dual Supply Voltage (max)
±18V
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Package Type
PDIP
Calibration Error Fs Typ
5%
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD650JNZ
Manufacturer:
AD
Quantity:
1 000
Part Number:
AD650JNZ
Manufacturer:
LINEAR
Quantity:
7 838
Part Number:
AD650JNZ
Manufacturer:
ADI
Quantity:
359
Part Number:
AD650JNZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD650
APPLICATIONS
DIFFERENTIAL VOLTAGE-TO-FREQUENCY
CONVERSION
The circuit in Figure 20 accepts a true floating differential input
signal. The common-mode input, V
+15 V to −5 V with respect to analog ground. The signal input,
V
inputs are low impedance; the source that drives the common-
mode input must supply the 0.5 mA drawn by the bipolar offset
current source, and the source that drives the signal input must
supply the integration current.
If less common-mode voltage range is required, then a lower
voltage Zener can be used. For example, if a 5 V Zener is used,
the V
not used at all, the common-mode range is ±5 V with respect to
analog ground. If no Zener is used, the 10 kΩ pulldown resistor
is not needed and the integrator output (Pin 1) is connected
directly to the comparator input (Pin 9).
AUTOZERO CIRCUIT
In order to exploit the full dynamic range of the AD650 VFC,
very small input voltages need to be converted. For example, a
six decade dynamic range based on a full scale of 10 V requires
accurate measurement of signals down to 10 μV. In these
situations, a well-controlled input offset voltage is imperative. A
constant offset voltage does not affect dynamic range but simply
shifts all of the frequency readings by a few hertz. However, if
the offset should change, it is not possible to distinguish
between a small change in a small input voltage and a drift of
the offset voltage. Therefore, the usable dynamic range is less.
The circuit shown in Figure 21 provides automatic adjustment
of the op amp offset voltage. The circuit uses an AD582 sample-
IN
, can be ±5 V with respect to the common-mode input. Both
CM
input can be in the range +10 V to −5 V. If the Zener is
INPUT
NOTES
1. V
2. V
V
CM
IN
V
CM
IN
IS THE SIGNAL INPUT
IS THE COMMON MODE INPUT
10kΩ
40kΩ
CM
, can be in the range
1000pF
330pF
1.24kΩ
C
OS
C
I
1
2
3
4
5
6
7
FREQ
±5V WITH RESPECT TO V
–V
S
OUT
Figure 20. Differential Input
SHOT
ONE
AMP
OP
+15V TO –5V WITH RESPECT TO ANALOG GROUND.
Rev. D | Page 16 of 20
AD650
IN
OUT
–V
0kHz TO 100kHz
S
FREQUENCY
S1
1mA
OUTPUT
CM
10V ZENER 1N5240
–0.6V
.
OFFSET
and-hold amplifier to control the offset, and the input voltage to
the VFC is switched between ground and the signal to be
measured via an
AD650 is adjusted by injecting a current into—or drawing a
current out of—Pin 13. Note that only one of the offset null pins
is used. During the VFC norm mode, the SHA is in the hold
mode and the hold capacitor is very large, 0.1 μF, which holds
the AD650 offset constant for a long period of time.
When the circuit is in the autozero mode, the SHA is in sample
mode and behaves like an op amp. The circuit is a variation of
the classical two amplifier servo loop, where the output of the
device under test (DUT)—here the DUT is the AD650 op
amp—is forced to ground by the feedback action of the control
amplifier—the SHA. Because the input of the VFC circuit is
connected to ground during the autozero mode, the input
current that can flow is determined by the offset voltage of the
AD650 op amp. Because the output of the integrator stage is
forced to ground, it is known that the voltage is not changing (it
is equal to ground potential). Therefore, if the output of the
integrator is constant, its input current must be zero, so the
offset voltage has been forced to be zero. Note that the output of
the DUT could have been forced to any convenient voltage
other than ground. All that is required is that the output voltage
be known to be constant. Note also that the effect of the bias
current at the inverting input of the AD650 op amp is also
mulled in this circuit. The 1000 pF capacitor shunting the
200 kΩ resistor is compensation for the two amplifier servo
loop. Two integrators in a loop require a single zero for
compensation. The 3.6 kΩ resistor from Pin 1 of the AD650 to
the negative supply is not part of the autozero circuit, but rather,
it is required for VFC operation at 1 MHz.
INPUT
TRIM
COMP
14
13
12
11
10
1kΩ
9
8
20kΩ
250kΩ
10kΩ
AD7512DI
+
1µF
+
+
0.1µF
0.1µF
analog switch. The offset of the
+15V
GND
–15V
GND
+5V

Related parts for AD650JNZ