AD650JNZ Analog Devices Inc, AD650JNZ Datasheet - Page 10

• Manufacturer Part Number: AD650JNZ
• Description: IC V-F/F-V CONVERTER 14-DIP
• Manufacturer: Analog Devices Inc
• Type: Volt to Freq & Freq to Voltr

Specifications of AD650JNZ

• Mounting Type: Through Hole
• Frequency - Max: 1MHz
• Full Scale: ±150ppm/°C
• Linearity: ±0.1%
• Package / Case: 14-DIP (0.300", 7.62mm)
• Frequency: 1MHz
• Full Scale Range: 1MHz
• Linearity %: 0.02%
• Supply Voltage Range: ± 9V To ± 18V
• Digital Ic Case Style: DIP
• No. Of Pins: 14
• Ic Generic Number: 650
• Converter Function: VFC/FVC
• Full Scale Frequency: 1000
• Power Supply Requirement: Dual
• Single Supply Voltage (typ): Not RequiredV
• Single Supply Voltage (max): Not RequiredV
• Single Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (min): ±9V
• Dual Supply Voltage (max): ±18V
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Package Type: PDIP
• Calibration Error Fs Typ: 5%
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD650
BIPOLAR V/F
Figure 11 shows how the internal bipolar current sink is used to
provide a half-scale offset for a ±5 V signal range, while providing
a 100 kHz maximum output frequency. The nominally 0.5 mA
(±10%) offset current sink is enabled when a 1.24 kΩ resistor is
connected between Pin 4 and Pin 5. Thus, with the grounded
10 kΩ nominal resistance shown, a −5 V offset is developed at
Pin 2. Because Pin 3 must also be at −5 V, the current through R
is 10 V/40 kΩ = +0.25 mA at V
Components are selected using the same guidelines outlined for
the unipolar configuration with one alteration. The voltage
across the total signal range must be equated to the maximum
input voltage in the unipolar configuration. In other words, the
value of the input resistor R
span, not the maximum input voltage. A diode from Pin 1 to
ground is also recommended. This is further discussed in the
Other Circuit Considerations section.
As in the unipolar circuit, R
coefficients to minimize the overall gain drift. The 1.24 kΩ
resistor used to activate the 0.5 mA offset current should also
have a low temperature coefficient. The bipolar offset current
has a temperature coefficient of approximately −200 ppm/°C.
UNIPOLAR V/F, NEGATIVE INPUT VOLTAGE
Figure 12 shows the connection diagram for V/F conversion of
negative input voltages. In this configuration, full-scale output
frequency occurs at negative full-scale input, and zero output
frequency corresponds with zero input voltage.
A very high impedance signal source can be used because it only
drives the noninverting integrator input. Typical input impedance
at this terminal is 1 GΩ or higher. For V/F conversion of positive
input signals using the connection diagram of Figure 4, the
signal generator must be able to source the integration current
to drive the AD650. For the negative V/F conversion circuit of
Figure 12, the integration current is drawn from ground
through R1 and R3, and the active input is high impedance.
±5V
IN
V
IN
IN
and C
is determined by the input voltage
IN
–15V
= +5 V, and 0 mA at V
5kΩ
R1
OS
1000pF
Figure 11. Connections for ±5 V Bipolar V/F with 0 kHz to 100 kHz TTL Output
must have low temperature
37.4kΩ
R3
C
INT
330pF
1.24kΩ
0.1µF
C
OS
10kΩ
1
2
3
4
5
6
7
FREQ
IN
–V
= –5 V.
S
OUT
SHOT
Rev. D | Page 10 of 20
ONE
AMP
OP
IN
AD650
IN
OUT
–V
S
S1
1mA
Circuit operation for negative input voltages is very similar to
positive input unipolar conversion described in the Unipolar
Configuration section. For best operating results use Equation 7
and Equation 8 in the Component Selection section.
F/V CONVERSION
The AD650 also makes a very linear frequency-to-voltage
converter. Figure 13 shows the connection diagram for F/V
conversion with TTL input logic levels. Each time the input
signal crosses the comparator threshold going negative, the one
shot is activated and switches 1 mA into the integrator input for
a measured time period (determined by C
increases, the amount of charge injected into the integration
capacitor increases proportionately. The voltage across the
integration capacitor is stabilized when the leakage current
through R1 and R3 equals the average current being switched
into the integrator. The net result of these two effects is an
average output voltage that is proportional to the input
frequency. Optimum performance can be obtained by selecting
components using the same guidelines and equations listed in
the Bipolar V/F section.
For a more complete description of this application, refer to
Analog Devices’ Application Note AN-279.
HIGH FREQUENCY OPERATION
Proper RF techniques must be observed when operating the
AD650 at or near its maximum frequency of 1 MHz. Lead
lengths must be kept as short as possible, especially on the one
shot and integration capacitors, and at the integrator summing
junction. In addition, at maximum output frequencies above
500 kHz, a 3.6 kΩ pull-down resistor from Pin 1 to −V
required (see Figure 14). The additional current drawn through
the pulldown resistor reduces the op amp’s output impedance
and improves its transient response.
–0.6V
OFFSET
INPUT
COMP
TRIM
14
13
12
11
10
9
8
20kΩ
DIGITAL
GND
0.1µF
250kΩ
1µF
1kΩ
ANALOG
GND
+5V
+15V
F
OUT
OS
). As the frequency
S
is