LM96194CISQ/NOPB National Semiconductor, LM96194CISQ/NOPB Datasheet - Page 74

IC TRUTHERM HDWR MONITOR 48-LLP

LM96194CISQ/NOPB

Manufacturer Part Number
LM96194CISQ/NOPB
Description
IC TRUTHERM HDWR MONITOR 48-LLP
Manufacturer
National Semiconductor
Series
PowerWise®, TruTherm®r
Datasheet

Specifications of LM96194CISQ/NOPB

Function
Fan Control, Temp Monitor
Topology
ADC (Sigma Delta), Comparator, Fan Control, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 85°C, External Sensor
Output Type
SMBus™
Output Alarm
No
Output Fan
Yes
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LLP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LM96194CISQTR
www.national.com
16.13.4 Register BFh PWM Ramp Control
If the time delay between steps is set to 0 ms, the PWM duty cycle goes immediately to 100% instead of ramping up gradually.
16.13.5 Register C0h Fan Boost Hysteresis (Zones 1/2)
If the temperature zone is above fan boost temperature and then drops below the fan boost temperature, the following occurs: the
PWM output remains at 100% until the temperature goes a certain amount below the fan boost temperature. These hysteresis
registers control this amount and can be set anywhere from 0°C to 15°C (unsigned).
Register
Address
Register
Address
BFh
C0h
Read/
Read/
Write
Write
R/W
R/W
3:0
7:4
3:0
7:4
Bit
Bit
PWM Ramp
VRD_RAMP
(Zones 1/2)
Hysteresis
PH_RAMP
Fan Boost
Register
Register
Control
Name
Name
Name
Name
H1
H2
or PH_RAMP
VRD_RAMP
Ah
Bh
Ch
Dh
Eh
0h
1h
2h
3h
4h
5h
6h
7h
8h
9h
Fh
Bit 7
Bit 7
R/W
R/W
R/W
R/W
R/W
R/W
Bit 6
Sets the time delay between ramp steps for the
VRD_HOT ramp up/ramp down PWM function.
Sets the time delay between ramp steps for the
PROCHOT ramp up/ramp down PWM function.
Sets the fan boost hysteresis for Zone 1a and 1b, has 1°
C resolution.
Sets the fan boost hysteresis for zone 2a and 2b, has 1°
C resolution.
Bit 6
PH_RAMP
H2
74
Bit 5
Bit 5
Time Delay between
Ramp Steps
Bit 4
Bit 4
100 ms
150 ms
200 ms
250 ms
300 ms
350 ms
400 ms
450 ms
500 ms
550 ms
600 ms
650 ms
700 ms
750 ms
50 ms
0 ms
Description
Description
Bit 3
Bit 3
Bit 2
Bit 2
VRD_RAMP
H1
Bit 1
Bit 1
Bit 0
Bit 0
Default
Default
Value
Value
44h
00h

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