MAX5965BUAX+ Maxim Integrated Products, MAX5965BUAX+ Datasheet - Page 36

IC PSE CTRLR FOR POE 36SSOP

MAX5965BUAX+

Manufacturer Part Number
MAX5965BUAX+
Description
IC PSE CTRLR FOR POE 36SSOP
Manufacturer
Maxim Integrated Products
Type
Power Over Ethernet Controller (PoE)r
Datasheet

Specifications of MAX5965BUAX+

Applications
IP Phones, Power over LAN, Network Routers and Switches
Internal Switch(s)
No
Voltage - Supply
2.4 V ~ 3.6 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-BSOP (0.300", 7.5mm Width)
Supply Voltage (max)
60 V
Supply Voltage (min)
32 V
Power Dissipation
1388.9 mW
Operating Temperature Range
0 C to + 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High-Power, Quad, Monolithic, PSE Controllers
for Power over Ethernet
Setting CL_DISC to 1 (Table 21) enables port over class
current protection, where the MAX5965A/MAX5965B
scales down the overcurrent limit (V
to the port classification status. This feature provides
protection to the system against PDs that violate their
maximum class current allowance.
The MAX5965 is programmed to switch to a high-power
configuration and HP_TIME is low, the higher current set-
ting is enabled only after a successful startup so that the
PD powers up as a normal 15W device. If HP_TIME is set
together with EN_HP_ALL, the higher current setting will
Power-enable pushbutton for semi and manual modes
is found in Table 22. Setting PWR_ON_ to 1 turns on
power to the corresponding port. Setting PWR_OFF_ to
1 turns off power to the port. PWR_ON_ is ignored when
the port is already powered and during shutdown.
PWR_OFF_ is ignored when the port is already off and
Table 21. Miscellaneous Configurations 1 Register
Table 22. Power-Enable Pushbuttons Register
36
INT_EN
RSTR_EN
Reserved
Reserved
POFF_CL
CL_DISC
OUT_ISO
HP_TIME
PWR_OFF4
PWR_OFF3
PWR_OFF2
PWR_OFF1
PWR_ON4
PWR_ON3
PWR_ON2
PWR_ON1
SYMBOL
SYMBOL
______________________________________________________________________________________
ADDRESS = 19h
ADDRESS = 17h
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
W
W
W
W
W
W
W
R
FLT_LIM
A logic-high powers off port 4
A logic-high powers off port 3
A logic-high powers off port 2
A logic-high powers off port 1
A logic-high powers on port 4
A logic-high powers on port 3
A logic-high powers on port 2
A logic-high powers on port 1
A logic-high enables INT functionality
A logic-high enables the autorestart protection time off (as set by the RSTR[1:0] bits)
Reserved
Reserved
A logic-high prevents power-up after a classification failure (I > 50mA, valid only in AUTO
mode)
A logic-high enables reduced current-limit voltage threshold (V
classification result
Forces DET_ to high impedance. Does not interfere with other circuit operation.
Enables high power after startup.
) according
be active before startup. For Classes 4, 5, and 6, the
corresponding enable bit in register R15h must be set
together with EN_HP_ALL. In any other cases, the cur-
rent level defaults to Class 0.
CL_DISC, together with EN_HP_CL_ (R15h[6:4]),
EN_HP_ALL (R15h[7]), and ENx_CL6 (R1Ch[7:4]) are
used to program the high-power mode. See Table 3 for
details.
Setting OUT_ISO high (Table 21), forces DET_ to a
high-impedance state.
A reset sets R17h = 0xC0.
during shutdown. After execution, the bits reset to 0.
During detection or classification, if PWR_ON_ goes
high, the MAX5965A/MAX5965B gracefully terminate
the current operation and turn on power to the port. The
MAX5965A/MAX5965B ignore the PWR_ON_ in auto
mode. A reset sets R19h = 00h.
DESCRIPTION
DESCRIPTION
FLT_LIM
) according to port

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