MAX5936ACESA+ Maxim Integrated Products, MAX5936ACESA+ Datasheet - Page 8

IC HOT-SWAP CTRLR -48V 8-SOIC

MAX5936ACESA+

Manufacturer Part Number
MAX5936ACESA+
Description
IC HOT-SWAP CTRLR -48V 8-SOIC
Manufacturer
Maxim Integrated Products
Type
Hot-Swap Controllerr
Datasheet

Specifications of MAX5936ACESA+

Applications
General Purpose
Internal Switch(s)
No
Voltage - Supply
-10 V ~ -80 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
-48V Hot-Swap Controllers with V
Step Immunity and No R
Figure 1. Functional Block Diagram
The MAX5936/MAX5937 conduct a load-probe test after
contact transients from the hot plug-in have settled. This
follows the MAX5936/MAX5937 power-up (when the
UVLO condition has been met for 220ms (t
to the turn-on of the power MOSFET. This test pulls a
user-programmable current through the load (1A, max)
for up to 220ms and tests for a voltage of 200mV across
the load at V
tor, R
voltage across the load exceeds 200mV, the test is trun-
cated and the GATE turn-on sequence is started. If at the
end of the 220ms test period the voltage across the load
has not reached 200mV, the load is assumed to be short-
ed and the current to the load from the LP pin is shut off.
The MAX5936A_/MAX5937A_ will timeout for 16 x t
then retry the load-probe test. The MAX5936L_/
MAX5937L_ will latch the fault condition indefinitely until
8
GND
_______________________________________________________________________________________
V
EE
LP
, between V
OUT
. This current is set by an external resis-
STEP_MON
UVLO
OUT
GND
V
EE
and LP (Figure 14). When the
BANDGAP
CONTROL
10V REG
V
5V REG
LOGIC
BG
UVLO
10µA
AND
REF
MAX5936
MAX5937
+10V
+5V
V
BG
STEP
(1.25V)
LP
)) and prior
CONTROLLER
SEQUENCER
DETECTION
FAULT
TIMER
LP
COMPARATORS
V
LOAD PROBE
75% OF V
SC
CONTROL
PGOOD
PGOOD
, V
LOGIC
GATE
TEST
CB
, AND
SENSE
CB
the UVLO is brought below 1.125V for 1.5ms or the power
is recycled. See the Applications Information section for
recommendations on selecting R
level.
Upon successful completion of the load-probe test, the
MAX5936/MAX5937 enter the power-up GATE cycle and
begin ramping the GATE voltage with a 52µA current
source. This current source is restricted if V
to ramp down faster than the default 9V/ms slew rate.
Charging up GATE enhances the power MOSFET in a
controlled manner and ramping V
rate controls the inrush current from the backplane. The
MAX5936/MAX5937 continue to charge up the GATE
until one of two events occurs: a normal power-up GATE
cycle is completed or a power-up to fault management is
detected (see the GATE Cycles section in Appendix A).
CURRENT SOURCE
TEMPERATURE-
COMPENSATED
52µA
2V AND
CLAMP
15V
IN
PGOOD
PGOOD
V
GATE
LP
OUT
OUT
LP
to set the current
at a user-settable
R
LOAD
OUT
begins
C
LOAD

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