ADE7763ARSRL Analog Devices Inc, ADE7763ARSRL Datasheet - Page 14

• Manufacturer Part Number: ADE7763ARSRL
• Description: IC ENERGY METER 1PHASE 20SSOP
• Manufacturer: Analog Devices Inc

Specifications of ADE7763ARSRL

• Input Impedance: 390 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.8V
• Current - Supply: 3mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SSOP (0.200", 5.30mm Width)
• Meter Type: Single Phase
• For Use With: EVAL-ADE7763ZEB - BOARD EVALUATION FOR ADE7763
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

ADE7763
The contents of the offset correction registers are 6-bit, sign and
magnitude coded. The weight of the LSB depends on the gain
setting, i.e., 1, 2, 4, 8, or 16. Table 6 shows the correctable offset
span for each of the gain settings and the LSB weight (mV) for
the offset correction registers. The maximum value that can be
written to the offset correction registers is ±31d—see Figure 26.
Figure 26 shows the relationship between the offset correction
register contents and the offset (mV) on the analog inputs for a
gain of 1. To perform an offset adjustment, connect the analog
inputs to AGND; there should be no signal on either Channel 1
or Channel 2. A read from Channel 1 or Channel 2 using the
waveform register indicates the offset in the channel. This offset
can be canceled by writing an equal and opposite offset value to
the Channel 1 offset register, or an equal value to the Channel 2
offset register. The offset correction can be confirmed by
performing another read. Note that when adjusting the offset of
Channel 1, the digital integrator and the HPF should be
disabled.
Table 6. Offset Correction Range—Channels 1 and 2
Gain
1
2
4
8
16
Figure 25. Effect of Channel Offsets on the Real Power Calculation
V
OS
Correctable Span
±50 mV
±37 mV
±30 mV
±26 mV
±24 mV
V × I
Figure 26. Channel 1 Offset Correction Range (Gain = 1)
× I
2
OS
0
–50mV
DC COMPONENT (INCLUDING ERROR TERM)
IS EXTRACTED BY THE LPF FOR REAL
POWER CALCULATION
ω
CH1OS[5:0]
0x3F
FREQUENCY (RAD/S)
0x1F
0x00
I
V
OS
OS
× V
0mV
× I
01,1111b
11,1111b
2ω
+50mV
OFFSET
ADJUST
SIGN + 5 BITS
LSB Size
1.61 mV/LSB
1.19 mV/LSB
0.97 mV/LSB
0.84 mV/LSB
0.77 mV/LSB
SIGN + 5 BITS
Rev. B | Page 14 of 56
The current and voltage rms offsets can be adjusted with the
IRMSOS and VRMSOS registers—see the Channel 1 RMS Offset
Compensation and Channel 2 RMS Offset Compensation
sections.
di/dt CURRENT SENSOR AND
DIGITAL INTEGRATOR
A di/dt sensor detects changes in magnetic field caused by ac
current. Figure 27 shows the principle of a di/dt current sensor.
The flux density of a magnetic field induced by a current is
directly proportional to the magnitude of the current. Changes
in the magnetic flux density passing through a conductor loop
generate an electromotive force (EMF) between the two ends of
the loop. The EMF is a voltage signal that is proportional to the
di/dt of the current. The voltage output from the di/dt current
sensor is determined by the mutual inductance between the
current-carrying conductor and the di/dt sensor. The current
signal must be recovered from the di/dt signal before it can be
used. An integrator is therefore necessary to restore the signal to
its original form. The ADE7763 has a built-in digital integrator
to recover the current signal from the di/dt sensor. The digital
integrator on Channel 1 is switched off by default when the
ADE7763 is powered up. Setting the MSB of CH1OS register
turns on the integrator. Figure 28, Figure 29, Figure 30, and
Figure 31 show the magnitude and phase response of the digital
integrator.
–10
–20
–30
–40
–50
10
0
Figure 27. Principle of a di/dt Current Sensor
Digital Integrator and Phase Compensator
Figure 28. Combined Gain Response of the
10
2
FREQUENCY (Hz)
MAGNETIC FIELD CREATED BY CURRENT
(DIRECTLY PROPORTIONAL TO CURRENT)
+ EMF (ELECTROMOTIVE FORCE)
– INDUCED BY CHANGES IN
MAGNETIC FLUX DENSITY (di/dt)
10
3