IDT70V9289L9PFI IDT, Integrated Device Technology Inc, IDT70V9289L9PFI Datasheet - Page 14

IC SRAM 1MBIT 9NS 100TQFP

IDT70V9289L9PFI

Manufacturer Part Number
IDT70V9289L9PFI
Description
IC SRAM 1MBIT 9NS 100TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT70V9289L9PFI

Format - Memory
RAM
Memory Type
SRAM - Dual Port, Synchronous
Memory Size
1M (64K x 16)
Speed
9ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Density
1Mb
Access Time (max)
20ns
Sync/async
Synchronous
Architecture
SDR
Clock Freq (max)
40MHz
Operating Supply Voltage (typ)
3.3V
Address Bus
32b
Package Type
TQFP
Operating Temp Range
-40C to 85C
Number Of Ports
2
Supply Current
240mA
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Word Size
16b
Number Of Words
64K
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
70V9289L9PFI
800-1401

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT70V9289L9PFI
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Timing Waveform of Flow-Through Read-to-Write-to-Read (OE = V
NOTES:
1. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2).
2. Output state (High, Low, or High-impedance) is determined by the previous cycle control signals.
3. CE
4. Addresses do not have to be accessed sequentially since ADS = V
5. "NOP" is "No Operation." Data in memory at the selected address may be corrupted and should be re-written to guarantee data integrity.
Timing Waveform of Flow-Through Read-to-Write-to-Read (OE Controlled)
IDT70V9389/289L
High-Speed 3.3V 64K x18/x16 Dual-Port Synchronous Pipelined Static RAM
reference use only.
0
, UB, LB, and ADS = V
ADDRESS
ADDRESS
DATA
DATA
DATA
DATA
UB, LB
UB, LB
CLK
R/
CE
CE
CLK
R/
CE
OUT
CE
OUT
OE
W
IN
W
IN
0
1
0
1
(4)
(4)
(2)
(2)
IL
; CE
t
t
t
t
t
t
SB
SW
t
SC
SA
t
SB
SW
SC
SA
An
An
1
, CNTEN, and CNTRST = V
t
t
t
t
t
HW
t
HC
t
t
HB
HA
HW
HC
HB
HA
t
t
t
CH1
t
CD1
CH1
CD1
t
t
CYC1
CYC1
READ
READ
t
CL1
t
CL1
Qn
Qn
An +1
An +1
t
t
DC
DC
t
CD1
t
OHZ
IH
. "NOP" is "No Operation".
(1)
IL
t
t
Qn + 1
SW
An + 2
SD
constantly loads the address on the rising edge of the CLK; numbers are for
Dn + 2
An + 2
t
t
HD
HW
6.42
14
NOP
t
CKHZ
(5)
(1)
WRITE
t
t
SW
SD
Dn + 2
An + 2
An + 3
Dn + 3
t
t
HW
HD
WRITE
Industrial & Commercial Temperature Ranges
An + 3
An + 4
t
CKLZ
t
OE
(1)
t
t
CD1
CD1
t
CKLZ
(1)
READ
READ
Qn + 3
Qn + 4
An + 4
An + 5
t
DC
t
DC
t
t
CD1
CD1
4856 drw 12
4856 drw 13
IL
)
(3)
(3)

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