NAND04GW3B2DN6E NUMONYX, NAND04GW3B2DN6E Datasheet - Page 45

• Manufacturer Part Number: NAND04GW3B2DN6E
• Description: IC FLASH 4GBIT 48TSOP
• Manufacturer: NUMONYX

Specifications of NAND04GW3B2DN6E

• Format - Memory: FLASH
• Memory Type: FLASH - Nand
• Memory Size: 4G (512M x 8)
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Speed: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NAND04G-B2D, NAND08G-BxC
7
8
Concurrent operations and extended read status
The NAND08G-BxC devices are composed of two 4-Gbit dice stacked together. This
configuration allows the devices to support concurrent operations, which means that while
performing an operation in one die (erase, read, program, etc.), another operation is
possible in the other die.
The standard read status register operation returns the status of the NAND08G-BxC device.
To provide information on each 4-Gbit die, the NAND08G-BxC devices feature an Extended
Read Status Register command that independently checks the status of each NAND04G-
B2D.
The following steps are required to perform concurrent operations:
1.
2.
3.
4.
All combinations of operations are possible except read while read. This is due to the fact
that the input/output bus is common to both dice.
Refer to
sequence, and to
Table 22.
Data protection
The devices feature a Write Protect, WP, pin, which can be used to protect the device
against program and erase operations. It is recommended to keep WP at V
up and power-down.
Read 2nd die status
Read 1st die status
Select one of the two dice by setting the most significant address bit A30 to ‘0’ or ‘1’
Execute one operation on this die
Launch a concurrent operation on the other die
Check the status of these operations by performing an extended read status register
operation.
Command
Table 22
Extended Read Status Register commands
for the description of the Extended Read Status Register command
Table
0x3FFFFFFF < Address ≤ 0x7FFFFFF
14. for the definition of the status register bits.
Address ≤ 0x3FFFFFFF
Address range
Concurrent operations and extended read status
1 bus write cycle
F2h
F3h
IL
during power-
45/72