MAX3301EETJ Maxim Integrated, MAX3301EETJ Datasheet - Page 24

• Manufacturer Part Number: MAX3301EETJ
• Description: USB Interface IC
• Manufacturer: Maxim Integrated

Specifications of MAX3301EETJ

• Operating Supply Voltage: 3 V to 4.5 V
• Operating Supply Current: 5 uA

Table 9. V
Four registers control all interrupt behavior of the
MAX3301E/MAX3302E. A source register (Table 10)
indicates the current status of the various interrupt
sources. An interrupt latch register (Table 11) indicates
which interrupts have occurred. An interrupt-enable low
and interrupt-enable high register enable interrupts on
rising or falling (or both) transitions. Tables 10–13 pro-
vide the bit configurations for the various interrupt regis-
ters. The interrupt latch, interrupt-enable low, and
interrupt-enable high registers have two addresses that
implement write- one-set and write-one-clear features for
each of these registers. Writing a 1 to the set address
sets that bit to 1. Writing a 1 to the clear address resets
that bit to 0. Writing a 0 to either address has no effect
on the bits.
Tables 14, 15, and 16 describe the special-function
registers. The special-function registers have two
addresses that implement write-one-set and write-one-
clear features for each of these registers. Writing a 1 to
USB On-the-Go Transceivers and Charge Pumps
Table 10. Interrupt Source Register (Address 08h is Read Only)
24
X = Don’t care.
BIT NUMBER
______________________________________________________________________________________
vbus_drv
0
1
2
3
4
5
6
7
1
0
0
0
BUS
SET COMMAND (ADDRESS 06h)
cr_int_sess_end
bdis_acon
Control Logic
SYMBOL
vbus_vld
sess_vld
id_gnd
id_float
dm_hi
dp_hi
vbus_dischrg
Special-Function Registers
X
1
0
0
Logic 1 if V
Logic 1 if V
Logic 1 if V
SRP method).
Logic 1 if V
Logic 1 if V
method).
Logic 1 if V
Logic 1 if bdis_acon_en = 1 and the MAX3301E/MAX3302E assert dp_pullup after detecting a
B device disconnect during HNP.
Log i c 1 i f V
0.6V ) , d ep end i ng on the val ue of i nt_sour ce ( b i t 5 of sp eci al - functi on r eg i ster 1, see Tab l e 14) .
Interrupt Registers
BU S
BUS
BUS
D+
ID_IN
D-
ID_IN
vbus_chrg
> dm_hi comparator threshold (D- assertion during data line pulsing through SRP
> dp_hi comparator threshold (D+ assertion during data line pulsing through
< sess_end com p ar ator thr eshol d , or i f V
> V
> session valid comparator threshold.
< 0.1 x V
> 0.9 x V
X
X
1
0
BUS
valid comparator threshold.
CC
CC
.
.
the set address sets that bit to 1. Writing a 1 to the clear
address resets that bit to 0. Writing a 0 to either
address has no effect on the bits. Special-function reg-
ister 1 determines whether hardware or software con-
trols the maximum data rate and suspend behavior,
sets the direction of data transfer, and toggles general-
purpose buffer mode. Special-function register 2
enables shutdown mode, configures the interrupt out-
put as open-drain or push-pull, sets the TRM power
source, and controls the D+/D- connections for audio
mode. Table 15 depicts the special-function register 2
for the MAX3301E and Table 16 depicts the special-
function register 2 for the MAX3302E.
The MAX3301E powers up in its lowest power state and
must be turned on by setting the sdwn bit to 0. The
MAX3302E powers up in the operational, VP/VM USB
mode. This allows a µP to use the USB port for power-
on boot-up, without having to access I
MAX3302E into low-power shutdown, set the sdwn bit
to 0. The MAX3302E also has special-function register
2 mapped to two I
MAX3302E, special-function register 2 can be
Not affected
vbus_drv
1
0
0
CONTENTS
BEHAVIOR OF MAX3301E/MAX3302E
D +
> cr _i nt com p ar ator thr eshol d ( 0.4V to
vbus_dischrg
Not affected
2
C register addresses. In the
0
1
0
2
Not affected
vbus_chrg
C. To put the
0
0
1