MAX9271GTJ/V+ Maxim Integrated, MAX9271GTJ/V+ Datasheet - Page 38

• Manufacturer Part Number: MAX9271GTJ/V+
• Description: Serializers & Deserializers - Serdes 1.5Gbps 16-bit Coax/STP serializer
• Manufacturer: Maxim Integrated
• Type: Serializerr

Specifications of MAX9271GTJ/V+

• Rohs: yes
• Data Rate: 1.5 Gbit/s
• Input Type: CMOS/LVCMOS
• Output Type: CML
• Number Of Inputs: 16
• Number Of Outputs: 1
• Operating Supply Voltage: 1.7 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: TQFN-32
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT

write to the device whose address changes (register 0x00
of the serializer for serializer device address change, or
register 0x01 of the deserializer for deserializer device
address change). Then write the same address into the
corresponding register on the other device (register 0x00
of the deserializer for serializer device address change,
or register 0x01 of the serializer for deserializer device
address change).
CONF1 and CONF0 are three-level inputs that control
the serial interface configuration and power-up defaults.
Connect CONF1or CONF0 through a pullup resistor to
IOVDD to set a high level, a pulldown resistor to GND to
set a low level, or IOVDD/2 or open to set a midlevel. For
digital control, use three-state logic to drive the three-
level logic inputs.
The serializer can block changes to registers. Set
CFGBLOCK to make all registers read only. Once set, the
registers remain blocked until the supplies are removed
or until PWDN is low.
Table 12. MAX9271 Feature Compatibility
Table 13. Double-Function Configuration
Maxim Integrated
HSYNC/VSYNC encoding
Hamming-code error correction
I
CRC error detection
Double input
Coax
I
2
2
LCCEN
C-to-I
S encoding
High
Low
MAX9271 FEATURE
2
C
high = 32-bit mode)
(low = 24-bit mode,
Three-Level Configuration Inputs
Functions as GPIO
GPIO1/BWS
FUNCTION
BWS input
Configuration Blocking
16-Bit GMSL Serializer with Coax or
If feature not supported in the deserializer, must be turned off in the serializer.
If feature not supported in the deserializer, must be turned off in the serializer.
If feature not supported in the deserializer, must use UART-to-I
If feature not supported in the deserializer, must be turned off in the serializer.
If feature not supported in the deserializer, data is output as a single word at half the
input frequency.
If feature not supported in the deserializer, Must connect unused serial input through 200nF
and 50I in series to AVDD, and set the reverse control-channel amplitude to 100mV.
If supported in the deserializer, disable I
(low = HS/VS encoding
disabled, high = HS/VS
MS/HVEN FUNCTION
high = bypass mode)
encoding enabled)
(low = base mode
HVEN input
MS input
The MAX9271 serializer is designed to pair with the
MAX9272 deserializer, but interoperates with any GMSL
deserializer. See
The serializer has five open-drain GPIOs available when
not used as data or configuration inputs. Setting the
GPIO enable bits (register 0x0E) to 1 enables the GPIOs
and internally connects the respective data or configura-
tion input low. Setting the GPIO output bits to 0 pulls the
output low, while setting the bits to 1 leaves the output
undriven, and pulled high through internal/external pullup
resistors. The GPIO input buffers are enabled when the
GPIO is enabled. The input states are stored in register
0x10 (read only). Set GPIO_OUT to 1 when using a GPIO_
as an input.
The serializer provides inputs for limited configuration of
the device when a FC is not connected. Connect LCCEN
= low upon power-up to disable the local control chan-
nel, and enable the double-function configuration inputs
(Table
power-up.
(low = error detection/correction
disabled, high = error detection/
RX/SDA/EDC FUNCTION
UART/I
Compatibility with Other GMSL Devices
GMSL Deserializer
correction enabled
Local Control-Channel Enable (LCCEN)
13). All input configuration states are latched at
2
EDC input
S in the deserializer.
2
C input/output
Table 12
STP Cable Drive
for operating limitations.
2
C or UART-to-UART.
TX/SCL/DBL FUNCTION
UART/I
MAX9271
high = double input)
(low = single input,
DBL input
2
C input/output
GPIOs
38