MAX9271GTJ/V+ Maxim Integrated, MAX9271GTJ/V+ Datasheet - Page 19

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MAX9271GTJ/V+

Manufacturer Part Number
MAX9271GTJ/V+
Description
Serializers & Deserializers - Serdes 1.5Gbps 16-bit Coax/STP serializer
Manufacturer
Maxim Integrated
Type
Serializerr
Datasheet

Specifications of MAX9271GTJ/V+

Rohs
yes
Data Rate
1.5 Gbit/s
Input Type
CMOS/LVCMOS
Output Type
CML
Number Of Inputs
16
Number Of Outputs
1
Operating Supply Voltage
1.7 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
TQFN-32
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Table 1. Power-Up Default Register Map (see Table 16)
Maxim Integrated
ADDRESS (hex)
REGISTER
0x06
0x07
0x00
0x01
0x02
0x03
0x04
0x05
0x08
DEFAULT (hex)
POWER-UP
0x80, 0xA0
0xXX
0x80
0x90
0x1F
0x00
0x87
0x00
0x00
16-Bit GMSL Serializer with Coax or
SERID = 1000000, serializer device address
CFGBLOCK = 0, registers 0x00 to 0x1F are read/write
DESID = 1001000, deserializer device address
RESERVED = 0
SS = 000 no spread spectrum
RESERVED = 1
PRNG = 11, automatically detect the pixel clock range
SRNG = 11, automatically detect serial-data rate
AUTOFM = 00, calibrate spread-modulation rate only once after locking
SDIV = 000000, autocalibrate sawtooth divider
SEREN = 1, serial link enabled
CLINKEN = 0, configuration link disabled
PRBSEN = 0, PRBS test disabled
SLEEP = 0, sleep mode disabled (see the Link Startup Procedure section)
INTTYPE = 01, local control channel uses UART
REVCCEN = 1, reverse control channel active (receiving)
FWDCCEN = 1, forward control channel active (sending)
I2CMETHOD = 0, I
ENJITFILT = 0, jitter filter disabled
PRBSLEN = 00, continuous PRBS length
RESERVED = 00
ENWAKEN = 0, OUT- wake-up receiver disabled
ENWAKEP = 1, OUT+ wake-up receiver enabled
CMLLVL = 1000 or 1010, output level determined by the state of CONF1 and CONF0
at power-up
PREEMP = 0000, preemphasis disabled
DBL = 0 or 1, single-/double-input mode setting determined by the state of LCCEN
and TX/SCL/DBL at startup
DRS = 0, high data-rate mode
BWS = 0 or 1, bit width setting determined by the state of LCCEN and GPIO1/BWS
at startup
ES = 0 or 1, edge-select input setting determined by the state of LCCEN and
TX/SCL/ES at startup
RESERVED = 0
HVEN = 0 or 1, HS/VS tracking encoding setting determined by the state of LCCEN
and MS/HVEN at startup
EDC = 00 or 10, error-detection/correction setting determined by the state of LCCEN
and RX/SDA/EDC at startup
INVVS = 0, serializer does not invert VSYNC
INVHS = 0, serializer does not invert HSYNC
RESERVED = 000000
2
C packets include register address
POWER-UP DEFAULT SETTINGS
(MSB FIRST)
STP Cable Drive
MAX9271
19

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