MAX11060GUU+T Maxim Integrated, MAX11060GUU+T Datasheet - Page 32

• Manufacturer Part Number: MAX11060GUU+T
• Description: Analog to Digital Converters - ADC 24/16Bit 4Ch Precision ADC
• Manufacturer: Maxim Integrated

Specifications of MAX11060GUU+T

• Rohs: yes
• Number Of Channels: 4
• Architecture: SAR
• Input Type: Single-Ended/Pseudo-Differential
• Interface Type: QSPI, Serial (SPI, Microwire)
• Operating Supply Voltage: 2.7 V to 3.6 V, 3 V to 3.6 V
• Maximum Power Dissipation: 1096 mW
• Number Of Converters: 4

The source impedance that drives the analog inputs
affects the sampling period.
Minimize the source impedance to ensure the input
capacitor fully charges during the sampling phase.
The required source resistance is defined by the
equation below:
where K = 1.5 and R
For example, the required source resistance to achieve
0.1% accuracy is:
If
R
Sources section, place a 0.1μF bypass capacitor
between AIN_+ and AIN_- to provide transient charge.
The average switched-capacitor load with a proper
bypass capacitor and XIN clock frequency =
24.576MHz is equivalent to a 130kΩ resistor connect-
ed between AIN_+ and AIN_-. This resistance is inde-
pendent of the value of the 0.1μF bypass capacitor. If
another XIN clock frequency is chosen, this resistance
is directly proportional to the XIN clock period.
Although the addition of a bypass capacitor helps charge
the devices’ 0 input capacitor, some gain error due to
resistive drop across the source resistance still remains.
Calculate this gain error using the following equation:
24-/16-Bit, 4-Channel, Simultaneous-Sampling,
Cascadable, Sigma-Delta ADCs
MAX11040K/MAX11060
32
Δ
R
SOURCE_MAX
Gain
SOURCE MAX
R
the
SOURCE MAX
=
source
_
R
_
SOURCE
, as defined in the Low-Impedance
R
=
=
<
SOURCE
1 5
<
=
1 5
1 5
.
.
K x C
1 5
impedance
.
INT
.
+
x pF x
x pF x
x pF x
R
120
Input Sampling Network
= 2600Ω.
x pF x In
4
4
LOAD
4
Source Impedance and
SAMP
4
120
120
ns
120
High-Impedance Sources
Low-Impedance Sources
t
SAMP
ns
ns
6 91
ns
ln
=
ln
x In
.
⎛
⎜
⎝
(
1000
0 1
R
⎛
⎜
⎝
is
. %
−
SOURCE
Error
⎛
⎜
⎝
1
2600
Error
1
)
greater
R
1
⎞
⎟
⎠
−
SOURCE
⎞
⎟
⎠
−
2600
Ω
⎞
⎟
⎠
2600
−
2600Ω
−
+ 130
=
R
Ω
INT
Ω
294
than
k
Ω
Ω
The analog filtering requirements in front of the devices
are considerably reduced compared to a conventional
converter with no on-chip filtering. The internal digital
filter has significant rejection of signals higher than the
Nyquist frequency of the output data rate that would
alias back into the sampled signal.
The internal digital filter does not provide rejection
close to the harmonics of the 3.072MHz modulator fre-
quency. For example, assuming an output data rate of
16ksps if the XIN clock is set to 24.576MHz, then the
band between 3.0686MHz and 3.0750MHz is not
explicitly filtered. Since this unfiltered band is very
small compared to its actual frequency, very little
broadband noise enters through this mechanism. If
focused narrowband noise in this band is present, a
simple analog filter can create significant attenuation at
this frequency because the ratio of passband-to-stop-
band frequency is large.
In addition, because the device’s common-mode rejec-
tion extends out to several 100kHz, the common-mode
noise susceptibility in this frequency range is substan-
tially reduced.
Providing additional filtering in some applications
ensures that differential noise signals outside the fre-
quency band of interest do not saturate the analog
modulator.
The modulator saturates if the input voltage exceeds its
full scale (±2.2V). The digital filter does not prevent a
large signal in the filter stopband from saturating the
modulator. If signals outside the band of interest cause
violation of this full scale while accurate conversion of
passband signals is desired, then additional analog fil-
tering is required to prevent saturation.
To calculate FIR_GAIN(f
1) Decide the number of evenly spaced frequencies
2) Create an array with a length that is 2x the number of
3) Fill this array with the filter coefficients provided in
4) Take an FFT of this array. The result represents the
between DC and the Nyquist frequency of the output
data rate at which correction factors are desired,
which is usually the same as the FFT result.
the desired frequencies. (Again, the result is likely to
correlate with the time domain array that is loaded
into an FFT algorithm.)
the Digital Filter section. Fill the rest of the array with
zeros.
response of the devices’ built-in FIR filter.
the Digital Filter in Typical FFT Analysis
Compensating for the Rolloff of
AIN_
):
Analog Filtering
Maxim Integrated