MAX11060GUU+T Maxim Integrated, MAX11060GUU+T Datasheet - Page 29

• Manufacturer Part Number: MAX11060GUU+T
• Description: Analog to Digital Converters - ADC 24/16Bit 4Ch Precision ADC
• Manufacturer: Maxim Integrated

Specifications of MAX11060GUU+T

• Rohs: yes
• Number Of Channels: 4
• Architecture: SAR
• Input Type: Single-Ended/Pseudo-Differential
• Interface Type: QSPI, Serial (SPI, Microwire)
• Operating Supply Voltage: 2.7 V to 3.6 V, 3 V to 3.6 V
• Maximum Power Dissipation: 1096 mW
• Number Of Converters: 4

Referring back to the analog input, since the entire sam-
pling section of the converter also paused for two clock
cycles, the sampling point for sample 5 is also paused
by two clock cycles, possibly creating a small distur-
bance at the SYNC falling edge. This disturbance is fil-
tered with the digital filter, which makes it less distinct.
If the SYNC falling edge occurred during the same XIN
clock period as the DRDYOUT signal, the disturbance
does not affect the periodic timing since the SYNC
falling edge would demand a pause of zero XIN clock
cycles. Hence, connecting the DRDYOUT of the last
converter to the SYNC inputs of many converters, as
illustrated in Figure 13, aligns the sampling of the con-
verters on the first SYNC falling edge, but does not dis-
turb a regular sampling process for future samples.
See the Multiple Device Synchronization section for dif-
ferent ways to use the SYNC input.
Figures 17 shows the bipolar I/O transfer function.
Code transitions occur halfway between successive-
integer LSB values. Output coding is binary, with 1 LSB
= (0.88 x V
V
V
The serial interface, logic, digital filter, and modulator
circuits reset to zero at power-up. The power-on reset
circuit releases this reset no more than 1ms after
V
Maxim Integrated
REFIO
REFIO
DVDD
) x 2/65536 for the MAX11060.
) x 2/16,777,216 in 24-bit mode, and (0.88 x
rises above 2V.
REFIO
24-/16-Bit, 4-Channel, Simultaneous-Sampling,
) x 2/524,288 in 19-bit mode, (0.88 x
Transfer Function
Power-On Reset
Cascadable, Sigma-Delta ADCs
MAX11040K/MAX11060
Figure 17. ADC Transfer Function
011...111
000...011
000...010
000...001
000...000
111...111
111...110
100...001
100...000
011..110
OUTPUT CODE
-FS
*N = 19 FOR 19-BIT TRANSFER
N = 24 FOR 24-BIT TRANSFER
N = 16 FOR MAX11060
1 LSB =
FUNCTION,
FUNCTION
-FS = -0.88 x V
FS = +0.88 x V
ZS = 0
2(0.88 x V
DIFFERENTIAL INPUT VOLTAGE (LSB)
2
N*
REFIO
REFIO
REFIO
)
0
FULL-SCALE
TRANSITION
FS - 3/2 LSB
FS
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