MAX11127ATI+ Maxim Integrated, MAX11127ATI+ Datasheet - Page 11

• Manufacturer Part Number: MAX11127ATI+
• Description: Analog to Digital Converters - ADC 10Bit 16Ch 1Msps Precision ADC
• Manufacturer: Maxim Integrated

Specifications of MAX11127ATI+

• Rohs: yes
• Number Of Channels: 16/8
• Architecture: SAR
• Conversion Rate: 1 MSPs
• Resolution: 10 bit
• Input Type: Single-Ended/Pseudo-Differential
• Snr: 61.7 dB
• Interface Type: 3-Wire, QSPI, SPI
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: TQFN-28
• Maximum Power Dissipation: 2758 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: 1 V

ELECTRICAL CHARACTERISTICS (MAX11120/MAX11123/MAX11126) (continued)
(V
unless otherwise noted. Typical values are at T
Note 2: Limits are 100% production tested at T
Note 3: Channel ID disabled.
Note 4: Tested in single-ended mode.
Note 5: Offset nulled.
Note 6: Line rejection D(D
Note 7: Tested and guaranteed with fully differential input.
Note 8: Conversion time is defined as the number of clock cycles multiplied by the clock period with a 50% duty cycle.
Note 9: The operational input voltage range for each individual input of a differentially configured pair is from V
Note 10: See
Note 11: Guaranteed by characterization.
Maxim Integrated
TIMING CHARACTERISTICS (Figure 1) (Note 11)
SCLK Clock Period
SCLK Duty Cycle
SCLK Fall to DOUT Transition
16th SCLK Fall to DOUT Disable
14th SCLK Fall to DOUT Disable
SCLK Fall to DOUT Enable
DIN to SCLK Rise Setup
SCLK Rise to DIN Hold
CS Fall to SCLK Fall Setup
SCLK Fall to CS Fall Hold
CNVST Pulse Width
CS or CNVST Rise to EOC Low
(Note 8)
CS Pulse Width
DD
= 2.35V to 3.6V, V
Maximum conversion time: 4.73Fs + N x 16 x T
T
operational input voltage difference is from -V
PARAMETER
OSC_MAX
Figure 3
= 88.2ns, T
OVDD
(Equivalent Input Circuit).
OUT
= 1.5V to 3.6V, f
) with V
1Msps, Low-Power, Serial 12-/10-/8-Bit,
OSC_TYP
SYMBOL
t
CNV_INT
t
DD
t
t
CSBW
t
t
t
t
DOD
CSW
t
DOT
DOE
t
CSH
t
t
CSS
CH
DH
CP
DS
= 75ns.
= 2.35V to 3.6V and V
SAMPLE
A
A
= +25NC.) (Note 2)
Externally clocked conversion
C
C
C
C
See Figure 6
See Figure 7, f
= +25NC. Limits over the operating temperature range are guaranteed by design.
LOAD
LOAD
LOAD
LOAD
= 1Msps, f
REF+
= 10pF
= 10pF, channel ID on
= 10pF, channel ID off
= 10pF
OSC_MAX
/2 to +V
SCLK
SAMPLE
CONDITIONS
REF+
.
REF+
= 16MHz, 50% duty cycle, V
V
V
= 2.35V.
OVDD
OVDD
= 1Msps
/2 or -V
MAX11120–MAX11128
4-/8-/16-Channel ADCs
= 1.5V to 2.35V
= 2.35V to 3.6V
REF+
to +V
REF+
.
62.4
MIN
REF+
40
4
4
4
1
4
1
5
5
= V
DD
TYP
5.3
, T
A
DD
= -40NC to +125NC,
MAX
16.5
6.2
to GND. The
60
15
15
16
14
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Fs
ns
%
11