LUCL8567AAU-D AGERE [Agere Systems], LUCL8567AAU-D Datasheet - Page 16

• Manufacturer Part Number: LUCL8567AAU-D
• Description: SLIC for Peoples Republic of China Applications
• Manufacturer: AGERE [Agere Systems]

L8567 SLIC for
People’s Republic of China Applications
Electrical Characteristics
Ring Trip Requirements
Table 11. Timing Requirements (DI, EN, DO, and RD), CCLK = 2.048 MHz
1. Unless otherwise specified, all times are measured from the 50% point of logic transitions.
2. This parameter is not tested in production. It is guaranteed by design and device characterization.
16
16
Ringing signal:
— Voltage, minimum 35 Vrms, maximum 100 Vrms.
— Frequency, 17 Hz to 28 Hz.
— Crest factor, 1.4 to 2.
Ringing trip:
— 100 ms (typical), 250 ms (V
Pretrip:
— The circuits in Figure 4 will not cause ringing trip.
Symbol
t
t
length = 530
t
t
t
t
R
PD01
C
WEN
PDR
SDC
HED
, t
IN
F
RD1, RD2, RD3
NSTAT/NTSD
Input Rise and Fall Time EN (10% to 90%)
Maximum Input Capacitance
Propagation Delay EN to DO
Propagation Delay EN to RD Outputs
Minimum Setup Time from DI to EN
Minimum Hold Time from EN to DI
Minimum Pulse Width of EN
B0/B1
CSEL
CCLK
EN
).
BAT
(continued)
Parameter
= –33 V, loop
Figure 5. Timing Requirements
2
2
2
1
2
2
tSDC
2
2
TIP
TIP
TIP
tPD01
tWEN
SWITCH CLOSES < 12 ms
Figure 4. Ring Trip Circuits
1465
Min
488
488
2 F
—
0
0
0
tHED
10 k
8 µF
100
Lucent Technologies Inc.
200
Max
977
75
10
—
—
—
5
August 1999
Data Sheet
Unit
pF
ns
ns
ns
ns
5-5841 (F)
s
s
RING
RING
RING
5-5808a