HS9-82C37ARH-Q INTERSIL [Intersil Corporation], HS9-82C37ARH-Q Datasheet

HS9-82C37ARH-Q

Manufacturer Part Number

HS9-82C37ARH-Q

Description

Radiation Hardened CMOS High Performance Programmable DMA Controller

Manufacturer

INTERSIL [Intersil Corporation]

Datasheet

1.HS9-82C37ARH-Q.pdf (29 pages)

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Download datasheet (198Kb)

August 1995

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

http://www.intersil.com or 407-727-9207

Features

• Radiation Hardened

• Low Power Consumption

• Pin Compatible with NMOS 8237A and the Intersil

• High Speed Data Transfers Up To 2.5 MBPS With 5MHz

• Four Independent Maskable Channels With Autoinitializa-

• Expandable to Any Number of Channels

• Memory-to-Memory Transfer Capability

• CMOS Compatible

• Hardened Field, Self-Aligned, Junction Isolated CMOS

• Single 5V Supply

• Military Temperature Range -55

Ordering Information

HS1-82C37ARH-Q

HS1-82C37ARH-8

HS1-82C37ARH-Sample

HS9-82C37ARH-Q

HS9-82C37ARH-8

HS9-82C37ARH/Sample

- Total Dose >10

- Transient Upset > 10

- Latch Up Free EPI-CMOS

- IDDSB = 50 A Maximum

- IDDOP = 4.0mA/MHz Maximum

82C37A

Clock

tion Capability

Process

PART NUMBER

RAD (Si)

RAD (Si)/s

C to +125

Intersil Corporation 1999

TEMPERATURE RANGE

Performance Programmable DMA Controller

-55

HS-82C37ARH

C to +125

+25

918

Description

The Intersil HS-82C37ARH is an enhanced, radiation

hardened CMOS version of the industry standard 8237A

Direct Memory Access (DMA) controller, fabricated using the

Intersil hardened ﬁeld, self-aligned silicon gate CMOS

process. The HS-82C37ARH offers increased functionality,

improved performance, and dramatically reduced power

consumption for the radiation environment. The high speed,

radiation hardness, and industry standard conﬁguration of

the HS-82C37ARH make it compatible with radiation

hardened microprocessors such as the HS-80C85RH and

the HS-80C86RH.

The HS-82C37ARH can improve system performance by

allowing external devices to transfer data directly to or from

system memory. Memory-to-memory transfer capability is

also provided, along with a memory block initialization

feature. DMA requests may be generated by either

hardware or software, and each channel is independently

programmable with a variety of features for ﬂexible

operation.

Static CMOS circuit design insures low operating power and

allows gated clock operation for an even further reduction of

power. Multimode programmability allows the user to select

from three basic types of DMA services, and reconﬁguration

under program control is possible even with the clock to the

controller stopped. Each channel has a full 64K address and

word count range, and may be programmed to autoinitialize

these registers following DMA termination (end of process).

The Intersil hardened ﬁeld CMOS process results in

performance equal to or greater than existing radiation resis-

tant products at a fraction of the power.

Radiation Hardened CMOS High

40 Lead SBDIP

42 Lead Ceramic Flatpack

PACKAGE

Spec Number

File Number

518058

3042.1

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