IC42S32400-6B ICSI [Integrated Circuit Solution Inc], IC42S32400-6B Datasheet - Page 54

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IC42S32400-6B

Manufacturer Part Number
IC42S32400-6B
Description
1M x 32 Bit x 4 Banks (128-MBIT) SDRAM
Manufacturer
ICSI [Integrated Circuit Solution Inc]
Datasheet
IC42S32400
IC42S32400L
Figure 19.2.Full Page Write Cycle (Burst Length=Full Page,CAS#Latency=2)
54
BS0,1
CAS#
A0-A9
RAS#
DQM
WE#
CKE
CLK
CS#
A10
DQ
Hi-Z
High
Command
Activate
Bank A
RAx
RAx
T0 T 1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T 11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
t
CK2
Command
Bank A
Write
CAx
DAx
DAx+1 DAx+2 DAx+3 DAx-1
Command
Activate
Bank B
RBx
RBx
The burst counter wraps
from the highest order
page address back to zero
during this time interval
DAx
DAx+1 DBx
Full Page burst operation does
not terminate when the burst
length is satisfied; the burst counter
increments and continues bursting
beginning with the starting address.
Command
Bank B
CBx
Write
DBx+1 DBx+2 DBx+3 DBx+4 DBx+5 DBx+6
Data is ignored
5
Burst Stop
Command
Integrated Circuit Solution Inc.
Precharge
Command
Bank B
Command
Activate
Bank B
RBy
RBy
DR038-0C 02/01/2005

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