K4S161622D-TC/L55 SAMSUNG [Samsung semiconductor], K4S161622D-TC/L55 Datasheet - Page 38

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K4S161622D-TC/L55

Manufacturer Part Number
K4S161622D-TC/L55
Description
512K x 16Bit x 2 Banks Synchronous DRAM
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
CLOCK
K4S161622D
Active/Precharge Power Down Mode @CAS Latency=2, Burst Length=4
A
ADDR
10
DQM
CKE
RAS
CAS
WE
/AP
DQ
CS
BA
*Note :
0
Power-down
1
Precharge
1. Both banks should be in idle state prior to entering precharge power down mode.
2. CKE should be set high at least 1CLK + tss prior to Row active command.
3. Can not violate minimum refresh specification. (32ms)
Entry
tSS
*Note 1
2
*Note 3
3
4
*Note 2
Power-down
Precharge
5
Exit
Row Active
6
Ra
Ra
Power-down
7
Active
Entry
tSS
8
9
tSS
Power-down
10
Active
Exit
*Note 2
11
Read
Ca
12
13
Qa0
14
Precharge
Qa1
tSHZ
15
CMOS SDRAM
Qa2
16
17
18
: Don't care
19

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