K4S161622D-TC/L55 SAMSUNG [Samsung semiconductor], K4S161622D-TC/L55 Datasheet - Page 30

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K4S161622D-TC/L55

Manufacturer Part Number
K4S161622D-TC/L55
Description
512K x 16Bit x 2 Banks Synchronous DRAM
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
CLOCK
K4S161622D
Page Write Cycle at Different Bank @Burst Length=4
A
ADDR
10
DQM
CKE
RAS
CAS
WE
/AP
DQ
CS
BA
*Note :
0
Row Active
(A-Bank)
RAa
RAa
1
1. To interrupt burst write by Row precharge, DQM should be asserted to mask invalid input data.
2. To interrupt burst write by Row precharge, both the write and the precharge banks must be the same.
2
3
(A-Bank)
DAa0 DAa1 DAa2
Write
CAa
4
Row Active
(B-Bank)
RBb
RBb
5
6
DAa3
tCDL
7
(B-Bank)
Write
DBb0 DBb1 DBb2 DBb3
CBb
8
9
HIGH
10
11
(A-Bank)
Write
DAc0 DAc1
CAc
12
13
(B-Bank)
Write
DBd0 DBd1
CBd
14
*Note 1
15
tRDL
(Both Banks)
Precharge
CMOS SDRAM
16
*Note 2
17
18
: Don't care
19

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