ZL30105_05 ZARLINK [Zarlink Semiconductor Inc], ZL30105_05 Datasheet - Page 29

• Manufacturer Part Number: ZL30105_05
• Description: T1/E1/SDH Stratum 3 Redundant System Clock Synchronizer for AdvancedTC TM and H.110
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

The following is an example of how active/redundant setup can be configured.
The active timing card is set based on the desired application and is set to:
The HOLDOVER and REF_FAIL pins help evaluate quality of clocks and quality of redundant clock.
The redundant timing card is set based on desired applications and is set to:
The HOLDOVER and REF_FAIL pins help evaluate quality of clocks and quality of redundant clock.
•
•
•
•
•
•
Primary master mode, SEC_MSTR=0
Normal Mode, MODE_SEL1:0=00 (forces device to the input reference set at REF_SEL)
Automatic mode, MODE_SEL1:0=11 (allows device to auto-switch if reference fails)
Normal (manual) mode, MODE_SEL1:0=00
REF2 and REF2_SYNC as the input reference, REF_SEL1=1 (forces redundant device to lock to output
of active card)
Secondary master mode, SEC_MSTR=1
MODE_SEL1:0=11
SEC_MSTR=0
MODE_SEL1:0=00
REF_SEL1:0=10
SEC_MSTR=1
Figure 19 - Clock Redundancy with Two Independent Timing Cards
BITS 0 clock
BITS 1 clock
BITS 0 clock
BITS 1 clock
Redundant Timing Card
Active Timing Card
REF2
REF0
REF1
REF2_SYNC
REF2_SYNC
REF2
REF0
REF1
Redundant Frame Sync (optional)
Redundant Clock
Active Clock
Active Frame Sync (optional)
Zarlink Semiconductor Inc.
ZL30105
ZL30105
ZL30105
OSC
OSC
29
Output Clocks
Output Clocks
Data Sheet