PSB4596 Siemens Semiconductor Group, PSB4596 Datasheet - Page 63
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PSB4596
Manufacturer Part Number
PSB4596
Description
Analog Line Interface Solution ALIS
Manufacturer
Siemens Semiconductor Group
Datasheet
1.PSB4596.pdf
(104 pages)
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9
9.1
Condition: RESET low, MCLK can be down
ALIS-D:
After initial application of VDD (power-on reset), reset of the setting pin to ’0’ during
operation or a software reset (see XOP command), ALIS-D enters the basic settings
mode. Basic settings means that the ALIS-D configuration registers CR0... CR5 and
XR0... XR7 are initialized to the default value (sleep mode). All programmable filters are
disabled.
If any voltage is applied to any input pin before the initial application of VDD, ALIS may
be unable to enter the basic settings mode. In this case, it is necessary to reset ALIS or
to initialize its configuration registers to the default value.
ALIS-A:
When the plug is connected to TIP/RING and the hook switch is closed, ALIS-A
generates its supply voltage from the line current and performs a power-on reset.
9.2
Condition: RESET ’1’, if used the external master clock can be deactivated.
It can be entered from any mode by programming the CLK_OFF bit in XR6. During deep
sleep mode, the serial control interface is ready to receive and register commands only
when MCLK is switched on (see “XR6 Extended Register 6 (Power State)” on page 49).
Incoming rings will be indicated by the Wake_up interrupt.
9.3
Condition: RESET ’1’, if used the external master clock must be activated.
When the RESET pin (RESET state) is released, ALIS enters sleep mode. ALIS is forced
to sleep mode when the PU (power up) bits are set to '00' in the SOP command. During
sleep mode, the serial control interface is ready to receive commands and transmit data.
Voice data received on the DAT_IN pin will be ignored. The ALIS configuration registers
the caller ID RAM, and the coefficient RAM can be loaded and read back in this mode.
9.4
Condition: RESET ’1’, if used the external master clock must be activated.
This mode is entered automatically when bit No_auto_ring is set to 0 from sleep mode
after the first ringing pulse or when the PU bits are set to '01' in the SOP command. In
this mode, ALIS will measure the level, frequency and cadence of the ringing signal. The
cadence between the first two ring bursts is stored in XR4. If the Caller_en bit is enabled,
an incoming caller ID will be decoded and stored (see CAO command).
Semiconductor Group
Operating Modes
Reset (Basic Settings Mode)
Deep Sleep Mode
Sleep Mode
Ringing Mode
63
Analog Line Interface Solution
PSB 4595 / PSB 4596
Operating Modes
Data Sheet 06.98