PSB4596 Siemens Semiconductor Group, PSB4596 Datasheet - Page 26
![no-image](/images/manufacturer_photos/0/6/607/siemens_semiconductor_group_sml.jpg)
PSB4596
Manufacturer Part Number
PSB4596
Description
Analog Line Interface Solution ALIS
Manufacturer
Siemens Semiconductor Group
Datasheet
1.PSB4596.pdf
(104 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PSB4596
Manufacturer:
SIEMENS/西门子
Quantity:
20 000
Part Number:
PSB4596-SV2.1G
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
Part Number:
PSB4596SV-2.1
Manufacturer:
SIEMENS/西门子
Quantity:
20 000
Company:
Part Number:
PSB4596SV2.1
Manufacturer:
SIEMENS
Quantity:
5 510
- Two transistors (T1, T2) to handle the line current. T2 must be of depletion type, in order
to deal with start-up. Recommended transistors: T1: SIEMENS BSP 88; T2: SIEMENS
BSP 129.
- Components for EMC protection: not shown, as they depend on the board layout.
ALIS-D can optionally be connected to the tip/ring to provide Caller ID functions. The CID
circuit requires two capacitors and four resistors.
5.2
The host interface consists of a serial µ-controller interface and a 16-bit linear data
interface. They are used to connect ALIS either to a - controller and or to a data pump.
The two serial interfaces can be accessed on two separate serial ports or in time-
multiplex (MUX) mode on a single serial port.
5.2.1
The ALIS internal configuration registers, the auxiliary ports, and the Coefficient RAM
(CRAM) are programmable via the serial µ-controller interface. This interface consists of
four pins:
CS:
DCLK:
DIN:
DOUT:
CS is used to start serial access to the ALIS registers and the Coefficient RAM. Following
a CS falling edge, the first eight bits received at DIN specify the command. Subsequent
data bytes (the number depends on the command) are stored in the selected
configuration registers or the selected part of the CRAM.
Serial interface specification: 8 bit, no parity, no start/stop bit. Every command must
begin with a CS falling edge.
Semiconductor Group
Host Interface
The µ-Controller Interface
Chip select, to enable interface (active low)
Clock, 1 kHz to 1024 kHz
Data input
Data output
26
Analog Line Interface Solution
Configuration Overview
PSB 4595 / PSB 4596
Data Sheet 06.98