PSB4596 Siemens Semiconductor Group, PSB4596 Datasheet - Page 33
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PSB4596
Manufacturer Part Number
PSB4596
Description
Analog Line Interface Solution ALIS
Manufacturer
Siemens Semiconductor Group
Datasheet
1.PSB4596.pdf
(104 pages)
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Figure 21 Protocol for Transmission of µC- and PCM Data in MUX Mode
5.3
ALIS operates with a typical master clock frequency of 16.384 MHz. This clock can either
be supplied from an external source or generated with a crystal by ALIS-D.
It is essential that the ratio of the master clock frequency to the FSC frequency is exactly
2048. This is of course guaranteed if the FSC signal is generated internally.
5.3.1
When providing the master clock externally, an external clock signal must be connected
to pin MCLK1. The MCLK2 pin must remain unconnected and the CLK_EXT bit in CR0
must be programmed to a logic ’1’. (see the section “CR0 Configuration Register 0
(Filters)” on page 39).
Semiconductor Group
Clocking
External clock
33
Analog Line Interface Solution
Configuration Overview
PSB 4595 / PSB 4596
Data Sheet 06.98