K4S56163LC Samsung semiconductor, K4S56163LC Datasheet - Page 6

• Manufacturer Part Number: K4S56163LC
• Description: 16Mx16 Mobile SDRAM 54CSP
• Manufacturer: Samsung semiconductor

K4S56163LC-R(B)F/R
AC OPERATING TEST CONDITIONS
OPERATING AC PARAMETER
Notes :
1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time
2. Minimum delay is required to complete write.
3. Minimum tRDL=2CLK and tDAL(=tRDL + tRP) are required to complete both of last data wite command(tRDL) and precharge
4. All parts allow every cycle column address change.
5. In case of row precharge interrupt, auto precharge and read burst stop.
AC input levels (Vih/Vil)
Input timing measurement reference level
Input rise and fall time
Output timing measurement reference level
Output load condition
Row active to row active delay
RAS to CAS delay
Row precharge time
Row active time
Row cycle time
Last data in to row precharge
Last data in to Active delay
Last data in to new col. address delay
Last data in to burst stop
Col. address to col. address delay
Number of valid output data
command(tRP). tRDL=1CLK can be supported only in the case under 100MHz with manual precharge mode.
and then rounding off to the next higher integer.
Output
(Fig. 1) DC Output Load Circuit
500
Parameter
Parameter
VDDQ
500
30pF
CAS latency=3
CAS latency=2
CAS latency=1
V
V
(AC operating conditions unless otherwise noted)
O H
OL
(DC) = 0.2V, I
(DC) = V
t
(V
t
t
t
t
t
t
t
t
RAS
RRD
RCD
t
CCD
Symbol
t
RAS
R D L
DAL
C D L
BDL
RP
R C
DD
(min)
(min)
(max)
DDQ
(min)
(min)
(min)
(min)
(min)
(min)
(min)
(min)
= 2.5V 0.2V, T
-0.2V, I
OL
= 0.1mA
O H
- 75
15
19
19
45
65
= -0.1mA
A
0.9 x V
= -25 C to 70 C)
-
0.5 x V
0.5 x V
See Fig. 2
tr/tf = 1/1
Value
-1H
19
19
19
50
70
DDQ
Output
tRDL + tRP
DDQ
DDQ
Version
/ 0.2
100
2
1
1
1
2
1
-1L
(Fig. 2) AC Output Load Circuit
19
24
24
60
84
0
Z0=50
-15
30
30
30
60
90
CMOS SDRAM
Rev. 1.4 Dec. 2002
Unit
CLK
CLK
CLK
CLK
ns
ns
ns
ns
us
ns
ea
-
Vtt=0.5 x VDDQ
Unit
50
ns
30pF
V
V
V
Note
2,3
1
1
1
1
1
3
2
2
4
5