XQ2V3000 Xilinx, XQ2V3000 Datasheet - Page 67

• Manufacturer Part Number: XQ2V3000
• Description: QPro Virtex-II 1.5V Military QML Platform FPGAs
• Manufacturer: Xilinx

QPro Virtex-II Pin-to-Pin Output Parameter Guidelines
All devices are 100% functionally tested. Listed below are representative values for typical pin locations and normal clock
loading. Values are expressed in nanoseconds unless otherwise noted.
Global Clock Input to Output Delay for LVTTL, 12 mA, Fast Slew Rate, with DCM
Table 57: Global Clock Input to Output Delay for LVTTL, 12 mA, Fast Slew Rate, with DCM
Global Clock Input to Output Delay for LVTTL, 12 mA, Fast Slew Rate, without DCM
Table 58: Global Clock Input to Output Delay for LVTTL, 12 mA, Fast Slew Rate, without DCM
DS122 (v1.1) January 7, 2004
Product Specification
Notes:
1.
2.
3.
Notes:
1.
2.
LVTTL Global Clock Input to Output delay using Output flip-flop,
12 mA, Fast Slew Rate, with DCM.
For data output with different standards, adjust the delays with the
values shown in
Adjustments, page
Global Clock and OFF with DCM
LVTTL Global Clock Input to Output Delay using Output flip-flop,
12 mA, Fast Slew Rate, without DCM.
For data output with different standards, adjust the delays with the
values shown in
Adjustments, page
Global Clock and OFF without DCM
Listed above are representative values where one global clock input drives one vertical clock line in each accessible column, and
where all accessible IOB and CLB flip-flops are clocked by the global clock net.
Output timing is measured with a 35 pF external capacitive load. The only time it is not 50% of V
other I/O standards and different loads, see
DCM output jitter is included in the measurement.
Listed above are representative values where one global clock input drives one vertical clock line in each accessible column, and
where all accessible IOB and CLB flip-flops are clocked by the global clock net.
Output timing is measured at 50% V
Table
47.
R
IOB Output Switching Characteristics Standard
IOB Output Switching Characteristics Standard
56.
56.
Description
Description
CC
threshold with 35 pF external capacitive load. For other I/O standards and different loads, see
Table
47.
www.xilinx.com
1-800-255-7778
QPro Virtex-II 1.5V Military QML Platform FPGAs
T
Symbol
Symbol
ICKOFDCM
T
ICKOF
XQ2V1000
XQ2V3000
XQ2V6000
CC
XQ2V1000
XQ2V3000
XQ2V6000
Device
Device
threshold is with LVCMOS. For
Value
Value
2.76
2.88
3.45
5.90
6.62
7.22
Units
Units
ns
ns
ns
ns
ns
ns
67