LH28F800BG Sharp Electrionic Components, LH28F800BG Datasheet - Page 14

• Manufacturer Part Number: LH28F800BG
• Description: 8 M-bit (512 kB x 16) SmartVoltage Flash Memory
• Manufacturer: Sharp Electrionic Components

The only other valid commands while block erase is
suspended are Read Status Register and Block
Erase Resume. After a Block Erase Resume
command is written to the flash memory, the WSM
will continue the block erase process. Status
register bits SR.6 and SR.7 will automatically clear
and RY/BY# will return to V
Resume
automatically outputs status register data when
read (see Fig. 5). V
(the same V
block erase is suspended. RP# must also remain at
V
erase). Block erase cannot resume until word write
operations initiated during block erase suspend
have completed.
4.8 Word Write Suspend Command
The Word Write Suspend command allows word
write interruption to read data in other flash memory
locations. Once the word write process starts,
writing the Word Write Suspend command requests
that the WSM suspend the word write sequence at
a predetermined point in the algorithm. The device
continues to output status register data when read
after the Word Write Suspend command is written.
Polling status register bits SR.7 and SR.2 can
determine when the word write operation has been
suspended (both will be set to "1"). RY/BY# will
also transition to V
the word write suspend latency.
At this point, a Read Array command can be
written to read data from locations other than that
which is suspended. The only other valid
commands while word write is suspended are Read
Status Register and Word Write Resume. After
Word Write Resume command is written to the
flash memory, the WSM will continue the word
write process. Status register bits SR.2 and SR.7
will automatically clear and RY/BY# will return to
V
written, the device automatically outputs status
IH
OL
. After the Word Write Resume command is
or V
HH
command
(the same RP# level used for block
PP
level used for block erase) while
OH
. Specification t
PP
is
must remain at V
written,
OL
. After the Erase
WHRH1
the
PPH1/2/3
defines
device
- 14 -
register data when read (see Fig. 6). V
remain at V
word write) while in word write suspend mode. RP#
must also remain at V
level used for word write).
4.9 Block Locking
This Boot Block flash memory architecture features
two hardware-lockable boot blocks so that the
kernel code for the system can be kept secure
while other blocks are programmed or erased as
necessary.
4.9.1 V
The V
complete write protection of all blocks in the flash
device.
4.9.2 BLOCK UNLOCKING
RP# = V
These blocks can now be programmed or erased.
RP# controls all block locking and V
protection against spurious writes. Table 5 defines
the write protection methods.
Block Erase
OPERATION
Word Write
or
PP
Table 5 Write Protection Alternatives
PP
HH
programming voltage can be held low for
= V
unlocks all lockable blocks.
PPH1/2/3
> V
IL
V
V
PP
PPLK
FOR COMPLETE PROTECTION
IL
LH28F800BG-L (FOR SOP)
(the same V
RP#
V
IH
V
V
X
HH
IH
IL
or V
All Blocks Locked.
All Blocks Locked.
2 Boot Blocks Locked.
All Blocks Unlocked.
HH
PP
(the same RP#
EFFECT
level used for
PP
provides
PP
must