SAB80C517A-N18 Siemens Semiconductor Group, SAB80C517A-N18 Datasheet - Page 58

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SAB80C517A-N18

Manufacturer Part Number
SAB80C517A-N18
Description
8-Bit CMOS Single-Chip Microcontroller
Manufacturer
Siemens Semiconductor Group
Datasheet

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Watchdog Units
The SAB 80C517A offers two enhanced fail safe mechanisms, which allow an automatic
recovery from hardware failure or software upset:
– programmable watchdog timer (WDT), variable from 512 s up to appr. 1.1 s time-out
– oscillator watchdog (OWD), monitors the on-chip oscillator and forces the micro-
Programmable Watchdog Timer
The WDT can be activated by hardware or software.
Hardware initialization is done when pin PE/SWD (Pin 4) is held high during RESET. The
SAB 80C517A then starts program execution with the WDT running. Since Pin PE/SWD is
only sampled during Reset (and hardware power down at parts with stepping code AD and
later) dynamical switching of the WDT is not possible.
Software initialization is done by setting bit SWDT.
A refresh of the watchdog timer is done by setting bits WDT and SWDT consecutively.
A block diagram of the watchdog timer is shown in figure 11.
When a watchdog timer resest occurs, the watchdog timer keeps on running, but a status flag
WDTS is set. This flag can also be cleared by software.
Semiconductor Group
Figure 11
Block Diagram of the Programmable Watchdog Timer
period @12 MHz. Upward compatible to SAB 80515 watchdog.
controller into reset state, in case the on-chip oscillator fails, controls the restart from
the Hardware Power Down Mode and provides clock for a fast internal reset after power-on.
57
SAB 80C517A/83C517A-5
1994-05-01

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