MC9S08GT16 MOTOROLA [Motorola, Inc], MC9S08GT16 Datasheet - Page 92

• Manufacturer Part Number: MC9S08GT16
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Chapter 6 Parallel Input/Output
PTEDDn — Data Direction for Port E Bit n (n = 0–7)
6.6.6
Port F includes eight general-purpose I/O pins that are not shared with any peripheral module. Port F pins
used as general-purpose I/O pins are controlled by the port F data (PTFD), data direction (PTFDD), pullup
enable (PTFPE), and slew rate control (PTFSE) registers.
PTFDn — Port PTF Data Register Bit n (n = 0–7)
92
These read/write bits control the direction of port E pins and what is read for PTED reads.
For port F pins that are inputs, reads return the logic level on the pin. For port F pins that are configured
as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port F pins that are configured as outputs, the logic
level is driven out the corresponding MCU pin.
Reset forces PTFD to all 0s, but these 0s are not driven out the corresponding pins because reset also
configures all port pins as high-impedance inputs with pullups disabled.
PTFD
PTFPE
PTFSE
PTFDD
1 = Output driver enabled for port E bit n and PTED reads return the contents of PTEDn.
0 = Input (output driver disabled) and reads return the pin value.
Port F Registers (PTFD, PTFPE, PTFSE, and PTFDD)
Reset:
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
PTFDD7
PTFPE7
PTFSE7
PTFD7
Bit 7
0
0
0
0
PTFDD6
PTFPE6
PTFSE6
MC9S08GB/GT Data Sheet, Rev. 2.3
PTFD6
Figure 6-14. Port F Registers
6
0
0
0
0
PTFDD5
PTFPE5
PTFSE5
PTFD5
5
0
0
0
0
PTFDD4
PTFPE4
PTFSE4
PTFD4
4
0
0
0
0
PTFPE3
PTFSE3
PTFDD3
PTFD3
3
0
0
0
0
PTFPE2
PTFSE2
PTFDD2
PTFD2
2
0
0
0
0
PTFDD1
PTFPE1
PTFSE1
PTFD1
Freescale Semiconductor
1
0
0
0
0
PTFDD0
PTFPE0
PTFSE0
PTFD0
Bit 0
0
0
0
0