MC9S08GT16 MOTOROLA [Motorola, Inc], MC9S08GT16 Datasheet - Page 50

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MC9S08GT16

Manufacturer Part Number
MC9S08GT16
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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Chapter 4 Memory
program time provided that the conditions above are met. In the case the next sequential address is the
beginning of a new row, the program time for that byte will be the standard time instead of the burst time.
This is because the high voltage to the array must be disabled and then enabled again. If a new burst
command has not been queued before the current command completes, then the charge pump will be
disabled and high voltage removed from the array.
4.4.5
An access error occurs whenever the command execution protocol is violated.
50
Any of the following specific actions will cause the access error flag (FACCERR) in FSTAT to be
set. FACCERR must be cleared by writing a 1 to FACCERR in FSTAT before any command can
be processed.
Access Errors
YES
Figure 4-3. FLASH Burst Program Flowchart
0
TO BUFFER ADDRESS AND DATA
WRITE COMMAND TO FCMD
NEW BURST COMMAND ?
MC9S08GB/GT Data Sheet, Rev. 2.3
TO LAUNCH COMMAND
AND CLEAR FCBEF
WRITE 1 TO FCBEF
WRITE TO FCDIV
WRITE TO FLASH
CLEAR ERROR
FACCERR ?
FACCERR ?
FPVIO OR
FCBEF ?
FCCF ?
START
DONE
1
NO
NO
1
1
(1)
(2)
0
0
YES
(2)
checking FCBEF or FCCF.
(1)
Wait at least four bus cycles before
after reset.
Only required once
ERROR EXIT
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