CY14B104N CYPRESS [Cypress Semiconductor], CY14B104N Datasheet - Page 3

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CY14B104N

Manufacturer Part Number
CY14B104N
Description
4 Mbit (512K x 8/256K x 16) nvSRAM
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet

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Pinouts
Pin Definitions
Document #: 001-07102 Rev. *L
DQ
DQ
Pin Name
A
A
HSB
0
0
0
V
0
BHE
BLE
V
V
WE
OE
NC
CE
– A
– A
– DQ
CAP
– DQ
CC
SS
[6]
18
17
15
7
(continued)
Power Supply Power Supply Inputs to the Device.
Power Supply AutoStore Capacitor. Supplies power to the nvSRAM during power loss to store data from SRAM to
Input/Output Bidirectional Data IO Lines for x8 Configuration. Used as input or output lines depending on
Input/Output Hardware Store Busy (HSB). When LOW this output indicates that a hardware store is in progress.
No Connect
IO Type
Ground
Input
Input
Input
Input
Input
Input
Address Inputs Used to Select one of the 524,288 bytes of the nvSRAM for x8 Configuration.
Address Inputs Used to Select one of the 262,144 words of the nvSRAM for x16 Configuration.
operation.
Bidirectional Data IO Lines for x16 Configuration. Used as input or output lines depending on
operation.
Write Enable Input, Active LOW. When selected LOW, data on the IO pins is written to the specific
address location.
Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the chip.
Output Enable, Active LOW. The active LOW OE input enables the data output buffers during read
cycles. IO pins are tri-stated on deasserting OE HIGH.
Byte High Enable, Active LOW. Controls DQ
Byte Low Enable, Active LOW. Controls DQ
Ground for the Device. Must be connected to the ground of the system.
When pulled LOW external to the chip it initiates a nonvolatile STORE operation. A weak internal pull
up resistor keeps this pin HIGH if not connected (connection optional). After each store operation HSB
will be driven HIGH for short time with standard output high current.
nonvolatile elements.
No Connect. This pin is not connected to the die.
Figure 3. Pin Diagram - 54 Pin TSOP II (x16)
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
V
V
WE
NC
NC
NC
NC
NC
CE
CC
SS
A
A
A
A
A
A
A
A
A
A
[5]
0
1
2
3
4
0
1
2
3
4
5
6
7
5
6
7
8
9
1
10
11
12
13
14
15
16
17
18
19
25
26
27
2
3
4
5
6
7
8
9
20
21
22
23
24
54 - TSOP II
(
Top View
not to scale)
(x16)
Description
49
41
40
39
37
32
28
50
48
47
46
45
44
43
42
38
36
35
34
33
31
30
29
54
53
52
51
7
15
- DQ
- DQ
HSB
DQ
NC
NC
A
OE
BHE
BLE
DQ
DQ
DQ
NC
NC
A
A
V
DQ
DQ
V
A
A
A
A
A
V
DQ
DQ
17
16
15
12
11
10
SS
CAP
14
13
0
CC
.
15
14
13
12
8
[4]
9
8
11
10
.
CY14B104L, CY14B104N
Page 3 of 25
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