Z8L180 ZILOG [Zilog, Inc.], Z8L180 Datasheet - Page 114

• Manufacturer Part Number: Z8L180
• Description: Z8018x Family MPU
• Manufacturer: ZILOG [Zilog, Inc.]

DM1 DM0 SM1 SM0 Transfer Mode
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
Table 13. Channel 0 Source
Table 14 describes all DMA TRANSFER mode combinations of DM0
DM1, SM0 SM1. Because I/O to/from I/O transfers are not implemented,
12 combinations are available.
Table 14. Transfer Mode Combinations
SM1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
SM0
0
1
0
1
Memory
Memory
Memory*
I/O
Memory
Memory
Memory
I/O
Memory
Memory
Reserved
Reserved
to
to
Memory
Memory
Memory/I/O
Memory
Memory
Memory
I/O
to
to
to
to
to
to
to
to
Memory
Memory
Memory
Memory
Memory
Memory*
Memory*
Memory
Increment/Decrement
SAR0+1, DAR0+1
SAR0-1, DAR0+1
SAR0 fixed, DAR0+ 1
SAR0 fixed DAR0+1
SAR0+1, DAR0-1
SAR0-1,DAR0-1
SAR0 fixed, DAR0-1
SAR0 fixed. DAR0-1
SAR0+ 1, DAR0 fixed
SAR0-1, DAR0 fixed
Address lncrement/Decrement
+ 1
-1
fixed
fixed
M PU Us e r M anual
UM005001-ZMP0400
Z 8018x Fam il y
9 9