CY8C20110_0809 CYPRESS [Cypress Semiconductor], CY8C20110_0809 Datasheet - Page 14

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CY8C20110_0809

Manufacturer Part Number
CY8C20110_0809
Description
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
AC I2C Specifications
Document Number: 001-17345 Rev. *E
F
T
T
T
T
T
T
T
T
T
Parameter
SDA
SCL
SCLI2C
HDSTAI2C
LOWI2C
HIGHI2C
SUSTAI2C
HDDATI2C
SUDATI2C
SUSTOI2C
BUFI2C
SPI2C
t
f
S
SCL clock frequency
Hold time (repeated) START
condition. After this period, the
first clock pulse is generated.
LOW period of the SCL clock
HIGH period of the SCL clock
Setup time for a repeated START
condition
Data hold time
Data setup time
Setup time for STOP condition
BUS free time between a STOP
and START condition
Pulse width of spikes suppressed
by the input filter
t
t
HDSTAI2C
LOWI2C
Description
Figure 7. Definition for Timing for Fast/Standard Mode on the I2C Bus
t
r
t
HDDATI2C
t
SUDATI2C
t
HIGHI2C
Standard Mode
Min
250
4.0
4.7
4.0
4.7
4.0
4.7
0
0
t
f
Max
100
t
SUSTAI2C
Min
100
0.6
1.3
0.6
0.6
0.6
1.3
Fast Mode
0
0
0
Sr
Max
400
50
t
HDSTAI2C
Unit
KHz
µs
µs
µs
µs
µs
ns
µs
µs
ns
Fast mode not supported for
V
DD
t
SPI2C
t
SUSTOI2C
< 3.0V
t
r
Notes
P
CY8C20110
Page 14 of 18
t
BUFI2C
S
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