PCA85133 NXP [NXP Semiconductors], PCA85133 Datasheet - Page 19

no-image

PCA85133

Manufacturer Part Number
PCA85133
Description
Universal LCD driver for low multiplex rates
Manufacturer
NXP [NXP Semiconductors]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCA85133U/2DA/Q1
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
PCA85133U/2DA/Q1Z
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
PCA85133U/2DA/Q1Z
0
Part Number:
PCA85133U/2DB/Q1
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
PCA85133_1
Product data sheet
7.16.1.1 START and STOP conditions
7.16.1 Bit transfer
7.16.2 System configuration
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as a control signal (see
Both data and clock lines remain HIGH when the bus is not busy.
A HIGH-to-LOW change of the data line, while the clock is HIGH, is defined as the START
condition (S).
A LOW-to-HIGH change of the data line, while the clock is HIGH, is defined as the STOP
condition (P).
The START and STOP conditions are shown in
A device generating a message is a transmitter, a device receiving a message is the
receiver. The device that controls the message is the master; and the devices which are
controlled by the master are the slaves. The system configuration is shown in
Fig 11. Bit transfer
Fig 12. Definition of START and STOP conditions
Fig 13. System configuration
SCL
SDA
SDA
SCL
TRANSMITTER/
RECEIVER
MASTER
START condition
SDA
SCL
S
Rev. 1 — 23 October 2009
RECEIVER
SLAVE
data valid
data line
stable;
TRANSMITTER/
RECEIVER
Figure
Universal LCD driver for low multiplex rates
SLAVE
allowed
change
of data
Figure
11).
12.
TRANSMITTER
MASTER
STOP condition
mba607
PCA85133
P
TRANSMITTER/
© NXP B.V. 2009. All rights reserved.
RECEIVER
MASTER
Figure
mbc622
mga807
SDA
SCL
19 of 44
13.

Related parts for PCA85133