PCA85133 NXP [NXP Semiconductors], PCA85133 Datasheet - Page 17

• Manufacturer Part Number: PCA85133
• Description: Universal LCD driver for low multiplex rates
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
PCA85133_1
Product data sheet
7.12 Subaddress counter
7.13 Output bank selector
7.14 Input bank selector
7.15 Blinking
The storage of display data is conditioned by the content of the subaddress counter.
Storage is allowed only when the content of the subaddress counter match with the
hardware subaddress applied to A0, A1, and A2. The subaddress counter value is defined
by the device-select command (see
and the hardware subaddress do not match, then data storage is inhibited but the data
pointer is incremented as if data storage had taken place. The subaddress counter is also
incremented when the data pointer overflows.
The storage arrangements described lead to extremely efficient data loading in cascaded
applications. When a series of display bytes are sent to the display RAM, automatic
wrap-over to the next PCA85133 occurs when the last RAM address is exceeded.
Subaddressing across device boundaries is successful even if the change to the next
device in the cascade occurs within a transmitted character (such as during the 27th
display data byte transmitted in 1:3 multiplex mode).
The hardware subaddress must not be changed whilst the device is being accessed on
the I
The output bank selector selects one of the four rows per display RAM address for
transfer to the display register. The actual row selected depends on the particular LCD
drive mode in operation and on the instant in the multiplex sequence.
The PCA85133 includes a RAM bank switching feature in the static and 1:2 multiplex drive
modes. In the static drive mode, the bank-select command may request the contents of
row 2 to be selected for display instead of the contents of row 0. In the 1:2 mode, the
contents of rows 2 and 3 may be selected instead of rows 0 and 1. This gives the
provision for preparing display information in an alternative bank and to be able to switch
to it once it is assembled.
The input bank selector loads display data into the display RAM in accordance with the
selected LCD drive configuration. Display data can be loaded in row 2 in static drive mode
or in rows 2 and 3 in 1:2 multiplex drive mode by using the bank-select command. The
input bank selector functions independently to the output bank selector.
The display blink capabilities of the PCA85133 are very versatile. The whole display can
blink at frequencies selected by the blink-select command (see
frequencies are fractions of the clock frequency. The ratios between the clock and blink
frequencies depend on the blink mode selected (see
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In 1:4 multiplex mode, all RAM addresses of row 0 are selected, these are followed by
the contents of row 1, row 2, and then row 3
In 1:3 multiplex mode, rows 0, 1, and 2 are selected sequentially
In 1:2 multiplex mode, rows 0 and 1 are selected
In static mode, row 0 is selected
2
C-bus interface.
Rev. 1 — 23 October 2009
Table
12). If the content of the subaddress counter
Universal LCD driver for low multiplex rates
Table
7).
Table
PCA85133
14). The blink
© NXP B.V. 2009. All rights reserved.
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