PCF8562TT-2 NXP [NXP Semiconductors], PCF8562TT-2 Datasheet - Page 17

• Manufacturer Part Number: PCF8562TT-2
• Description: Universal LCD driver for low multiplex rates
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
PCF8562
Product data sheet
7.10 Display RAM
The display RAM is a static 32  4-bit RAM which stores LCD data. There is a one-to-one
correspondence between
A logic 1 in the RAM bitmap indicates the on-state of the corresponding LCD element;
similarly, a logic 0 indicates the off-state.
The display RAM bit map
backplane outputs BP0 to BP3, and the columns 0 to 31 which correspond with the
segment outputs S0 to S31. In multiplexed LCD applications the segment data of the first,
second, third, and fourth row of the display RAM are time-multiplexed with BP0, BP1,
BP2, and BP3 respectively.
When display data is transmitted to the PCF8562, the display bytes received are stored in
the display RAM in accordance with the selected LCD drive mode. The data is stored as it
arrives and depending on the current multiplex drive mode the bits are stored singularly, in
pairs, triples or quadruples. To illustrate the filling order, an example of a 7-segment
numeric display showing all drive modes is given in
depicted applies equally to other LCD types.
Fig 11. Display RAM bit map
•
•
•
the bits in the RAM bitmap and the LCD elements
the RAM columns and the segment outputs
the RAM rows and the backplane outputs.
display RAM rows/
backplane outputs
The display RAM bit map shows the direct relationship between the display RAM addresses and
the segment outputs and between the bits in a RAM word and the backplane outputs.
rows
(BP)
All information provided in this document is subject to legal disclaimers.
0
1
2
3
Rev. 6 — 16 June 2011
0
Figure 11
1
2
shows the rows 0 to 3 which correspond with the
3
display RAM addresses/segment outputs (S)
4
Universal LCD driver for low multiplex rates
columns
Figure
12; the RAM filling organization
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PCF8562
© NXP B.V. 2011. All rights reserved.
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