PNX1300 Philips, PNX1300 Datasheet - Page 324

• Manufacturer Part Number: PNX1300
• Description: Media Processors
• Manufacturer: Philips

Philips Semiconductors
Dual clipped add of signed 16-bit halfwords
SYNTAX
FUNCTION
DESCRIPTION
pairs of high and low 16-bit halfwords of rsrc1 and rsrc2. Both sums are clipped into the range [2
[0x7fff..0x8000]) and written into the corresponding halfwords of rdest. All values are signed 16-bit integers.
the modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
r30 = 0x12340032, r40 = 0x00010002
r10 = 0, r30 = 0x12340032, r40 = 0x00010002
r20 = 1, r30 = 0x12340032, r40 = 0x00010002
r50 = 0x80000001, r80 = 0xffff7fff
r110 = 0x00017fff, r120 = 0x7fff7fff
As shown below, the
The
[ IF rguard ] dspidualadd rsrc1 rsrc2
if rguard then {
}
rsrc1
temp1
temp2
if temp1 < 0xffff8000 then temp1
if temp2 < 0xffff8000 then temp2
if temp1 > 0x7fff then temp1
if temp2 > 0x7fff then temp2
rdest<31:16>
rdest<15:0>
dspidualadd
31
sign_ext16to32(rsrc1<15:0>) + sign_ext16to32(rsrc2<15:0>)
sign_ext16to32(rsrc1<31:16>) + sign_ext16to32(rsrc2<31:16>)
signed
Initial Values
17-bit signed sums
temp1<15:0>
Two full-precision
temp2<15:0>
dspidualadd
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls
15
rdest
0x7fff
0x7fff
17
0x8000
0x8000
31
Clip to [2
signed
operation computes two 16-bit clipped, signed sums separately on the two
signed
dspidualadd r30 r40
IF r10 dspidualadd r30 r40
IF r20 dspidualadd r30 r40
dspidualadd r50 r80
dspidualadd r110 r120
15
signed
–1 .. –2
0
15
]
0
rdest
15
17
PRELIMINARY SPECIFICATION
rsrc2
Operation
Clip to [2
31
signed
signed
PNX1300/01/02/11 DSPCPU Operations
15
–1 .. –2
signed
r60
r90
r125
15
]
0
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
0
dspidualabs dspidualmul
r70
r100
dspidualsub dspiabs
15
dspidualadd
ATTRIBUTES
r60
no change, since guard is
false
r100
r90
r125
SEE ALSO
signed
0x12350034
0x80007fff
0x12350034
0x7fff7fff
Result
15
–1..–2
dspalu
1, 3
No
70
—
0
2
2
15
A-26
] (or