SI2107 SILABS [Silicon Laboratories], SI2107 Datasheet - Page 31

• Manufacturer Part Number: SI2107
• Description: SATELLITE RECEIVER FOR DVB-S/DSS
• Manufacturer: SILABS [Silicon Laboratories]

System Mode
Coarse Tune
Lock Stat 1
Lock Stat 2
Device ID
Acq Ctrl 1
8. Control Registers
The control registers can be divided into three main classes: Initialization, Run-time, and Status. Initialization
registers (“I”) need only be programmed once following device power-up. Run-time registers (“RT”) are the primary
registers for device control. Status registers (“S”) provide device state information. The corresponding category of
each register is indicated in the rightmost column of Table 19.
Pin Ctrl 1
Pin Ctrl 2
TS Ctrl 1
TS Ctrl 2
Int Stat 1
Int Stat 2
Int Stat 3
Int Stat 4
ADC SR
Acq Stat
Int En 1
Int En 2
Int En 3
Int En 4
Bypass
Name
Addr.
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
10h
11h
14h
15h
16h
I2C
RCVU_E
RCVL_E
RCVU_I
INT_EN
RCVL_I
CN_E
TSEP
RCVL
CN_I
AQF
AQS
D7
AGCTS_E
VTBER_E
AGCTS_I
AGCL_E
AGCL_I
VTBR_I
AGCL
AGCF
TSVP
INTT
D6
DEV[3:0]
Table 19. Register Summary
RSER_E MSGPE_E
INC_DS
RSER_I
TSPCS
DS_BP
STU_E
CEL_E
CEL_I
STU_I
TSSP
INTP
CEF
CEL
D5
System Configuration
Preliminary Rev. 0.7
Receiver Status
Tuning Control
MSGPE_I
TSE_OE
Interrupts
CRU_E
RS_BP
SRL_E
CRU_I
TSCD
SRL_I
TSSL
SRF
SRL
D4
MOD[1:0]
ADCSR[7:0]
CTF[7:0]
TSV_OE
VTU_E
STL_E
DI_BP
TSCM
TSDD
VTU_I
STL_I
FE_E
FE_I
STF
STL
D3
TSS_OE
CRL_E
FSU_E
CRL_I
TSPG
FSU_I
TSCE
FF_E
GPO
FF_I
CRF
CRL
D2
Si2107/08/09/10
REV[3:0]
SYSM[2:0]
MSGR_E
TSC_OE
MSGR_I
SCD_E
VTL_E
SCD_I
TSDF
VTL_I
VTL
VTF
D1
TSSCR[1:0]
PSEL[1:0]
MSGTD_E
MSGTO_I
TSD_OE
OCD_E
AQF_E
FSL_E
OCD_I
AQF_I
FSL_I
TSM
FSL
FSF
D0
31
RT
RT
RT
S
S
S
S
S
S
S
S
I
I
I
I
I
I
I
I
I
I